Lines Matching refs:instr
101 int FormatVFPRegister(Instruction* instr, const char* format);
102 void PrintMovwMovt(Instruction* instr);
103 int FormatVFPinstruction(Instruction* instr, const char* format);
104 void PrintCondition(Instruction* instr);
105 void PrintShiftRm(Instruction* instr);
106 void PrintShiftImm(Instruction* instr);
107 void PrintShiftSat(Instruction* instr);
108 void PrintPU(Instruction* instr);
112 int FormatRegister(Instruction* instr, const char* option);
115 int FormatOption(Instruction* instr, const char* option);
116 void Format(Instruction* instr, const char* format);
117 void Unknown(Instruction* instr);
123 void DecodeType01(Instruction* instr);
124 void DecodeType2(Instruction* instr);
125 void DecodeType3(Instruction* instr);
126 void DecodeType4(Instruction* instr);
127 void DecodeType5(Instruction* instr);
128 void DecodeType6(Instruction* instr);
130 int DecodeType7(Instruction* instr);
132 void DecodeTypeVFP(Instruction* instr);
133 void DecodeType6CoprocessorIns(Instruction* instr);
135 void DecodeSpecialCondition(Instruction* instr);
137 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
138 void DecodeVCMP(Instruction* instr);
139 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
140 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
181 void Decoder::PrintCondition(Instruction* instr) {
182 Print(cond_names[instr->ConditionValue()]);
213 void Decoder::PrintShiftRm(Instruction* instr) {
214 ShiftOp shift = instr->ShiftField();
215 int shift_index = instr->ShiftValue();
216 int shift_amount = instr->ShiftAmountValue();
217 int rm = instr->RmValue();
221 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
225 if (instr->RegShiftValue() == 0) {
239 int rs = instr->RsValue();
249 void Decoder::PrintShiftImm(Instruction* instr) {
250 int rotate = instr->RotateValue() * 2;
251 int immed8 = instr->Immed8Value();
259 void Decoder::PrintShiftSat(Instruction* instr) {
260 int shift = instr->Bits(11, 7);
264 shift_names[instr->Bit(6) * 2],
265 instr->Bits(11, 7));
271 void Decoder::PrintPU(Instruction* instr) {
272 switch (instr->PUField()) {
325 int Decoder::FormatRegister(Instruction* instr, const char* format) {
328 int reg = instr->RnValue();
332 int reg = instr->RdValue();
336 int reg = instr->RsValue();
340 int reg = instr->RmValue();
344 int reg = instr->RtValue();
350 int rlist = instr->RlistValue();
374 int Decoder::FormatVFPRegister(Instruction* instr, const char* format) {
383 reg = instr->VFPNRegValue(precision);
385 reg = instr->VFPMRegValue(precision);
387 if ((instr->TypeValue() == 7) &&
388 (instr->Bit(24) == 0x0) &&
389 (instr->Bits(11, 9) == 0x5) &&
390 (instr->Bit(4) == 0x1)) {
392 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4);
394 reg = instr->VFPDRegValue(precision);
398 int immed8 = instr->Immed8Value();
417 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
459 void Decoder::PrintMovwMovt(Instruction* instr) {
460 int imm = instr->ImmedMovwMovtValue();
461 int rd = instr->RdValue();
473 int Decoder::FormatOption(Instruction* instr, const char* format) {
476 if (instr->Bit(21) == 0) {
484 if (instr->HasB()) {
491 PrintCondition(instr);
495 double d = instr->DoubleImmedVmov();
501 uint32_t lsbit = instr->Bits(11, 7);
502 uint32_t width = instr->Bits(20, 16) + 1;
503 if (instr->Bit(21) == 0) {
515 if (instr->HasH()) {
533 instr->Bits(width + lsb - 1, lsb));
537 if (instr->HasLink()) {
545 PrintMovwMovt(instr);
550 if (instr->HasL()) {
553 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
554 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
555 if (instr->Bit(5) == 1) {
569 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
579 "%d", instr->Offset12Value());
586 (instr->Bits(19, 8) << 4) +
587 instr->Bits(3, 0));
592 int offs8 = (instr->ImmedHValue() << 4) | instr->ImmedLValue();
599 PrintPU(instr);
603 return FormatRegister(instr, format);
609 if (instr->TypeValue() == 0) {
610 PrintShiftRm(instr);
612 ASSERT(instr->TypeValue() == 1);
613 PrintShiftImm(instr);
618 PrintShiftSat(instr);
622 PrintShiftRm(instr);
627 PrintSoftwareInterrupt(instr->SvcValue());
631 if (instr->HasSign()) {
637 if (instr->HasS()) {
644 int off = (instr->SImmed24Value() << 2) + 8;
649 reinterpret_cast<byte*>(instr) + off));
665 if (instr->Bit(22) == 0) {
673 return FormatVFPinstruction(instr, format);
677 return FormatVFPRegister(instr, format);
680 if (instr->HasW()) {
698 void Decoder::Format(Instruction* instr, const char* format) {
702 format += FormatOption(instr, format);
716 Unknown(instr); \
721 // For currently unimplemented decodings the disassembler calls Unknown(instr)
723 void Decoder::Unknown(Instruction* instr) {
724 Format(instr, "unknown");
728 void Decoder::DecodeType01(Instruction* instr) {
729 int type = instr->TypeValue();
730 if ((type == 0) && instr->IsSpecialType0()) {
732 if (instr->Bits(7, 4) == 9) {
733 if (instr->Bit(24) == 0) {
735 if (instr->Bit(23) == 0) {
736 if (instr->Bit(21) == 0) {
740 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
742 if (instr->Bit(22) == 0) {
747 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
753 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
763 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
766 Unknown(instr); // not used by V8
768 } else if ((instr->Bit(20) == 0) && ((instr->Bits(7, 4) & 0xd) == 0xd)) {
770 switch (instr->PUField()) {
772 if (instr->Bit(22) == 0) {
773 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
775 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
780 if (instr->Bit(22) == 0) {
781 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
783 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
788 if (instr->Bit(22) == 0) {
789 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
791 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
796 if (instr->Bit(22) == 0) {
797 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
799 Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
811 switch (instr->PUField()) {
813 if (instr->Bit(22) == 0) {
814 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
816 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
821 if (instr->Bit(22) == 0) {
822 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
824 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
829 if (instr->Bit(22) == 0) {
830 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
832 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
837 if (instr->Bit(22) == 0) {
838 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
840 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
852 } else if ((type == 0) && instr->IsMiscType0()) {
853 if (instr->Bits(22, 21) == 1) {
854 switch (instr->BitField(7, 4)) {
856 Format(instr, "bx'cond 'rm");
859 Format(instr, "blx'cond 'rm");
862 Format(instr, "bkpt 'off0to3and8to19");
865 Unknown(instr); // not used by V8
868 } else if (instr->Bits(22, 21) == 3) {
869 switch (instr->BitField(7, 4)) {
871 Format(instr, "clz'cond 'rd, 'rm");
874 Unknown(instr); // not used by V8
878 Unknown(instr); // not used by V8
880 } else if ((type == 1) && instr->IsNopType1()) {
881 Format(instr, "nop'cond");
883 switch (instr->OpcodeField()) {
885 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
889 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
893 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
897 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
901 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
905 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
909 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
913 Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
917 if (instr->HasS()) {
918 Format(instr, "tst'cond 'rn, 'shift_op");
920 Format(instr, "movw'cond 'mw");
925 if (instr->HasS()) {
926 Format(instr, "teq'cond 'rn, 'shift_op");
935 if (instr->HasS()) {
936 Format(instr, "cmp'cond 'rn, 'shift_op");
938 Format(instr, "movt'cond 'mw");
943 if (instr->HasS()) {
944 Format(instr, "cmn'cond 'rn, 'shift_op");
953 Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
957 Format(instr, "mov'cond's 'rd, 'shift_op");
961 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
965 Format(instr, "mvn'cond's 'rd, 'shift_op");
978 void Decoder::DecodeType2(Instruction* instr) {
979 switch (instr->PUField()) {
981 if (instr->HasW()) {
982 Unknown(instr); // not used in V8
985 Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
989 if (instr->HasW()) {
990 Unknown(instr); // not used in V8
993 Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
997 Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
1001 Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
1013 void Decoder::DecodeType3(Instruction* instr) {
1014 switch (instr->PUField()) {
1016 VERIFY(!instr->HasW());
1017 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
1021 if (instr->Bit(4) == 0) {
1022 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
1024 if (instr->Bit(5) == 0) {
1025 switch (instr->Bits(22, 21)) {
1027 if (instr->Bit(20) == 0) {
1028 if (instr->Bit(6) == 0) {
1029 Format(instr, "pkhbt'cond 'rd, 'rn, 'rm, lsl #'imm05@07");
1031 if (instr->Bits(11, 7) == 0) {
1032 instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #32");
1034 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #'imm05@07");
1048 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
1052 switch (instr->Bits(22, 21)) {
1060 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1061 if (instr->Bits(19, 16) == 0xF) {
1062 switch (instr->Bits(11, 10)) {
1064 Format(instr, "uxtb16'cond 'rd, 'rm, ror #0");
1067 Format(instr, "uxtb16'cond 'rd, 'rm, ror #8");
1070 Format(instr, "uxtb16'cond 'rd, 'rm, ror #16");
1073 Format(instr, "uxtb16'cond 'rd, 'rm, ror #24");
1084 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1085 if (instr->Bits(19, 16) == 0xF) {
1086 switch (instr->Bits(11, 10)) {
1088 Format(instr, "uxtb'cond 'rd, 'rm, ror #0");
1091 Format(instr, "uxtb'cond 'rd, 'rm, ror #8");
1094 Format(instr, "uxtb'cond 'rd, 'rm, ror #16");
1097 Format(instr, "uxtb'cond 'rd, 'rm, ror #24");
1101 switch (instr->Bits(11, 10)) {
1103 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #0");
1106 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #8");
1109 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #16");
1112 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #24");
1127 if (!instr->HasW()) {
1128 if (instr->Bits(5, 4) == 0x1) {
1129 if ((instr->Bit(22) == 0x0) && (instr->Bit(20) == 0x1)) {
1131 Format(instr, "sdiv'cond'b 'rn, 'rm, 'rs");
1137 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
1141 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
1142 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
1143 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1146 if (instr->Bit(22)) {
1147 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
1149 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
1154 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) {
1155 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1156 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16));
1158 if (instr->RmValue() == 15) {
1159 Format(instr, "bfc'cond 'rd, 'f");
1161 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1167 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
1180 void Decoder::DecodeType4(Instruction* instr) {
1181 if (instr->Bit(22) != 0) {
1183 Unknown(instr);
1185 if (instr->HasL()) {
1186 Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
1188 Format(instr, "stm'cond'pu 'rn'w, 'rlist");
1194 void Decoder::DecodeType5(Instruction* instr) {
1195 Format(instr, "b'l'cond 'target");
1199 void Decoder::DecodeType6(Instruction* instr) {
1200 DecodeType6CoprocessorIns(instr);
1204 int Decoder::DecodeType7(Instruction* instr) {
1205 if (instr->Bit(24) == 1) {
1206 if (instr->SvcValue() >= kStopCode) {
1207 Format(instr, "stop'cond 'svc");
1212 reinterpret_cast<int32_t*>(instr
1214 *reinterpret_cast<char**>(instr
1216 *reinterpret_cast<char**>(instr
1221 Format(instr, "svc'cond 'svc");
1224 DecodeTypeVFP(instr);
1230 // void Decoder::DecodeTypeVFP(Instruction* instr)
1248 void Decoder::DecodeTypeVFP(Instruction* instr) {
1249 VERIFY((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
1250 VERIFY(instr->Bits(11, 9) == 0x5);
1252 if (instr->Bit(4) == 0) {
1253 if (instr->Opc1Value() == 0x7) {
1255 if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x1)) {
1257 if (instr->SzValue() == 0x1) {
1258 Format(instr, "vmov'cond.f64 'Dd, 'Dm");
1260 Format(instr, "vmov'cond.f32 'Sd, 'Sm");
1262 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
1264 Format(instr, "vabs'cond.f64 'Dd, 'Dm");
1265 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
1267 Format(instr, "vneg'cond.f64 'Dd, 'Dm");
1268 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
1269 DecodeVCVTBetweenDoubleAndSingle(instr);
1270 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) {
1271 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1272 } else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) &&
1273 (instr->Bit(8) == 1)) {
1275 int fraction_bits = 32 - ((instr->Bit(5) << 4) | instr->Bits(3, 0));
1276 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Dd");
1279 } else if (((instr->Opc2Value() >> 1) == 0x6) &&
1280 (instr->Opc3Value() & 0x1)) {
1281 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1282 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1283 (instr->Opc3Value() & 0x1)) {
1284 DecodeVCMP(instr);
1285 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) {
1286 Format(instr, "vsqrt'cond.f64 'Dd, 'Dm");
1287 } else if (instr->Opc3Value() == 0x0) {
1288 if (instr->SzValue() == 0x1) {
1289 Format(instr, "vmov'cond.f64 'Dd, 'd");
1291 Unknown(instr); // Not used by V8.
1294 Unknown(instr); // Not used by V8.
1296 } else if (instr->Opc1Value() == 0x3) {
1297 if (instr->SzValue() == 0x1) {
1298 if (instr->Opc3Value() & 0x1) {
1299 Format(instr, "vsub'cond.f64 'Dd, 'Dn, 'Dm");
1301 Format(instr, "vadd'cond.f64 'Dd, 'Dn, 'Dm");
1304 Unknown(instr); // Not used by V8.
1306 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
1307 if (instr->SzValue() == 0x1) {
1308 Format(instr, "vmul'cond.f64 'Dd, 'Dn, 'Dm");
1310 Unknown(instr); // Not used by V8.
1312 } else if ((instr->Opc1Value() == 0x0) && !(instr->Opc3Value() & 0x1)) {
1313 if (instr->SzValue() == 0x1) {
1314 Format(instr, "vmla'cond.f64 'Dd, 'Dn, 'Dm");
1316 Unknown(instr); // Not used by V8.
1318 } else if ((instr->Opc1Value() == 0x0) && (instr->Opc3Value() & 0x1)) {
1319 if (instr->SzValue() == 0x1) {
1320 Format(instr, "vmls'cond.f64 'Dd, 'Dn, 'Dm");
1322 Unknown(instr); // Not used by V8.
1324 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
1325 if (instr->SzValue() == 0x1) {
1326 Format(instr, "vdiv'cond.f64 'Dd, 'Dn, 'Dm");
1328 Unknown(instr); // Not used by V8.
1331 Unknown(instr); // Not used by V8.
1334 if ((instr->VCValue() == 0x0) &&
1335 (instr->VAValue() == 0x0)) {
1336 DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(instr);
1337 } else if ((instr->VLValue() == 0x0) &&
1338 (instr->VCValue() == 0x1) &&
1339 (instr->Bit(23) == 0x0)) {
1340 if (instr->Bit(21) == 0x0) {
1341 Format(instr, "vmov'cond.32 'Dd[0], 'rt");
1343 Format(instr, "vmov'cond.32 'Dd[1], 'rt");
1345 } else if ((instr->VLValue() == 0x1) &&
1346 (instr->VCValue() == 0x1) &&
1347 (instr->Bit(23) == 0x0)) {
1348 if (instr->Bit(21) == 0x0) {
1349 Format(instr, "vmov'cond.32 'rt, 'Dd[0]");
1351 Format(instr, "vmov'cond.32 'rt, 'Dd[1]");
1353 } else if ((instr->VCValue() == 0x0) &&
1354 (instr->VAValue() == 0x7) &&
1355 (instr->Bits(19, 16) == 0x1)) {
1356 if (instr->VLValue() == 0) {
1357 if (instr->Bits(15, 12) == 0xF) {
1358 Format(instr, "vmsr'cond FPSCR, APSR");
1360 Format(instr, "vmsr'cond FPSCR, 'rt");
1363 if (instr->Bits(15, 12) == 0xF) {
1364 Format(instr, "vmrs'cond APSR, FPSCR");
1366 Format(instr, "vmrs'cond 'rt, FPSCR");
1375 Instruction* instr) {
1376 VERIFY((instr->Bit(4) == 1) && (instr->VCValue() == 0x0) &&
1377 (instr->VAValue() == 0x0));
1379 bool to_arm_register = (instr->VLValue() == 0x1);
1382 Format(instr, "vmov'cond 'rt, 'Sn");
1384 Format(instr, "vmov'cond 'Sn, 'rt");
1389 void Decoder::DecodeVCMP(Instruction* instr) {
1390 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1391 VERIFY(((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1392 (instr->Opc3Value() & 0x1));
1395 bool dp_operation = (instr->SzValue() == 1);
1396 bool raise_exception_for_qnan = (instr->Bit(7) == 0x1);
1399 if (instr->Opc2Value() == 0x4) {
1400 Format(instr, "vcmp'cond.f64 'Dd, 'Dm");
1401 } else if (instr->Opc2Value() == 0x5) {
1402 Format(instr, "vcmp'cond.f64 'Dd, #0.0");
1404 Unknown(instr); // invalid
1407 Unknown(instr); // Not used by V8.
1412 void Decoder::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
1413 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1414 VERIFY((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3));
1416 bool double_to_single = (instr->SzValue() == 1);
1419 Format(instr, "vcvt'cond.f32.f64 'Sd, 'Dm");
1421 Format(instr, "vcvt'cond.f64.f32 'Dd, 'Sm");
1426 void Decoder::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
1427 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1428 VERIFY(((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) ||
1429 (((instr->Opc2Value() >> 1) == 0x6) && (instr->Opc3Value() & 0x1)));
1431 bool to_integer = (instr->Bit(18) == 1);
1432 bool dp_operation = (instr->SzValue() == 1);
1434 bool unsigned_integer = (instr->Bit(16) == 0);
1438 Format(instr, "vcvt'cond.u32.f64 'Sd, 'Dm");
1440 Format(instr, "vcvt'cond.s32.f64 'Sd, 'Dm");
1444 Format(instr, "vcvt'cond.u32.f32 'Sd, 'Sm");
1446 Format(instr, "vcvt'cond.s32.f32 'Sd, 'Sm");
1450 bool unsigned_integer = (instr->Bit(7) == 0);
1454 Format(instr, "vcvt'cond.f64.u32 'Dd, 'Sm");
1456 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Sm");
1460 Format(instr, "vcvt'cond.f32.u32 'Sd, 'Sm");
1462 Format(instr, "vcvt'cond.f32.s32 'Sd, 'Sm");
1474 void Decoder::DecodeType6CoprocessorIns(Instruction* instr) {
1475 VERIFY(instr->TypeValue() == 6);
1477 if (instr->CoprocessorValue() == 0xA) {
1478 switch (instr->OpcodeValue()) {
1481 if (instr->HasL()) {
1482 Format(instr, "vldr'cond 'Sd, ['rn - 4*'imm08@00]");
1484 Format(instr, "vstr'cond 'Sd, ['rn - 4*'imm08@00]");
1489 if (instr->HasL()) {
1490 Format(instr, "vldr'cond 'Sd, ['rn + 4*'imm08@00]");
1492 Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]");
1501 bool to_vfp_register = (instr->VLValue() == 0x1);
1503 Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}");
1505 Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}");
1510 Unknown(instr); // Not used by V8.
1512 } else if (instr->CoprocessorValue() == 0xB) {
1513 switch (instr->OpcodeValue()) {
1516 if (instr->Bits(7, 6) != 0 || instr->Bit(4) != 1) {
1517 Unknown(instr); // Not used by V8.
1518 } else if (instr->HasL()) {
1519 Format(instr, "vmov'cond 'rt, 'rn, 'Dm");
1521 Format(instr, "vmov'cond 'Dm, 'rt, 'rn");
1526 if (instr->HasL()) {
1527 Format(instr, "vldr'cond 'Dd, ['rn - 4*'imm08@00]");
1529 Format(instr, "vstr'cond 'Dd, ['rn - 4*'imm08@00]");
1534 if (instr->HasL()) {
1535 Format(instr, "vldr'cond 'Dd, ['rn + 4*'imm08@00]");
1537 Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]");
1546 bool to_vfp_register = (instr->VLValue() == 0x1);
1548 Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}");
1550 Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}");
1555 Unknown(instr); // Not used by V8.
1558 Unknown(instr); // Not used by V8.
1563 void Decoder::DecodeSpecialCondition(Instruction* instr) {
1564 switch (instr->SpecialValue()) {
1566 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1567 (instr->Bit(4) == 1)) {
1569 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1570 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1571 int imm3 = instr->Bits(21, 19);
1575 Unknown(instr);
1579 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1580 (instr->Bit(4) == 1)) {
1582 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1583 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1584 int imm3 = instr->Bits(21, 19);
1588 Unknown(instr);
1592 if (instr->Bits(21, 20) == 0) {
1594 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1595 int Rn = instr->VnValue();
1596 int type = instr->Bits(11, 8);
1597 int size = instr->Bits(7, 6);
1598 int align = instr->Bits(5, 4);
1599 int Rm = instr->VmValue();
1605 } else if (instr->Bits(21, 20) == 2) {
1607 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1608 int Rn = instr->VnValue();
1609 int type = instr->Bits(11, 8);
1610 int size = instr->Bits(7, 6);
1611 int align = instr->Bits(5, 4);
1612 int Rm = instr->VmValue();
1619 Unknown(instr);
1624 if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
1625 int Rn = instr->Bits(19, 16);
1626 int offset = instr->Bits(11, 0);
1630 } else if (instr->Bit(23) == 0) {
1638 Unknown(instr);
1642 Unknown(instr);
1667 Instruction* instr = Instruction::At(instr_ptr);
1671 instr->InstructionBits());
1672 if (instr->ConditionField() == kSpecialCondition) {
1673 DecodeSpecialCondition(instr);
1686 DecodeType2(instr);
1691 switch (instr->TypeValue()) {
1694 DecodeType01(instr);
1698 DecodeType2(instr);
1702 DecodeType3(instr);
1706 DecodeType4(instr);
1710 DecodeType5(instr);
1714 DecodeType6(instr);
1718 return DecodeType7(instr);
