Lines Matching full:addsd
2218 // Since we operate on +0 and/or -0, addsd and andsd have the same effect.2219 __ addsd(left_reg, right_reg);2242 __ addsd(left, right);4035 __ addsd(xmm_scratch, input_reg);4117 __ addsd(input_reg, xmm_scratch); // Convert -0 to +0.