Lines Matching full:addsd
1863 // Since we operate on +0 and/or -0, addsd and andsd have the same effect.1864 __ addsd(left_reg, right_reg);1887 __ addsd(left, right);3585 __ addsd(xmm_scratch, input_reg);3665 __ addsd(input_reg, xmm_scratch); // Convert -0 to +0.