Lines Matching defs:Class
361 class DefaultABIInfo : public ABIInfo {
379 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
430 class PNaClABIInfo : public ABIInfo {
442 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
524 class X86_32ABIInfo : public ABIInfo {
525 enum Class {
552 Class classify(QualType Ty) const;
572 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
819 X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
835 Class C = classify(Ty);
1080 class X86_64ABIInfo : public ABIInfo {
1081 enum Class {
1101 static Class merge(Class Accum, Class Field);
1117 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1139 /// The \arg Lo class will be NoClass iff the argument is ignored.
1141 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1143 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1215 class WinX86_64ABIInfo : public ABIInfo {
1228 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1295 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
1314 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1348 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
1349 Class &Hi) const {
1381 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
1384 // considered. The resulting class is calculated according to
1387 // (a) If both classes are equal, this is the resulting class.
1389 // (b) If one of the classes is NO_CLASS, the resulting class is
1390 // the other class.
1393 // class.
1398 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
1399 // MEMORY is used as class.
1401 // (f) Otherwise class SSE is used.
1422 Class &Lo, Class &Hi, bool isNamedArg) const {
1423 // FIXME: This code can be simplified by introducing a simple value class for
1424 // Class pairs with appropriate constructor methods for the various
1433 Class &Current = OffsetBase < 64 ? Lo : Hi;
1511 // least significant one belongs to class SSE and all the others to class
1561 // than four eightbytes, ..., it has class MEMORY.
1566 // fields, it has class MEMORY.
1585 Class FieldLo, FieldHi;
1602 // than four eightbytes, ..., it has class MEMORY.
1620 // Reset Lo class, this will be recomputed.
1628 "Unexpected base class!");
1636 // initialized to class NO_CLASS.
1637 Class FieldLo, FieldHi;
1656 // four eightbytes, or it contains unaligned fields, it has class MEMORY.
1676 // separately. Each eightbyte gets initialized to class
1678 Class FieldLo, FieldHi;
1833 /// classification that put one of the two halves in the INTEGER class.
1873 "Unexpected base class!");
1945 /// low 8 bytes of an XMM register, corresponding to the SSE class.
2046 /// first class aggregate to represent them. For example, if the low part of
2090 X86_64ABIInfo::Class Lo, Hi;
2112 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
2117 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
2135 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
2141 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
2147 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
2161 // never occur as a hi class.
2181 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
2191 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
2208 // first class struct aggregate with the high and low part: {low, high}
2220 X86_64ABIInfo::Class Lo, Hi;
2241 class is MEMORY, pass the argument
2245 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
2257 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
2280 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
2324 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
2335 // first class struct aggregate with the high and low part: {low, high}
2680 class NaClX86_64ABIInfo : public ABIInfo {
2692 class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
2718 class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
2778 class PPC64_SVR4_ABIInfo : public DefaultABIInfo {
2819 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
2833 class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
3037 class ARMABIInfo : public ABIInfo {
3078 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
3127 // 6.1.2.3 There is one VFP co-processor register class using registers
3354 assert(Base && "Base class should be set for homogeneous aggregate");
3549 assert(Base && "Base class should be set for homogeneous aggregate");
3660 class NaClARMABIInfo : public ABIInfo {
3672 class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo {
3700 class AArch64ABIInfo : public ABIInfo {
3720 class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
3862 assert(Base && "Base class should be set for homogeneous aggregate");
4112 class NVPTXABIInfo : public ABIInfo {
4124 class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo {
4223 class SystemZABIInfo : public ABIInfo {
4245 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
4540 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
4579 class MipsABIInfo : public ABIInfo {
4599 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
4677 // Iterate over fields in the struct/class and check if there are any aligned
4766 // 1. The size of the struct/class is no larger than 128-bit.
4767 // 2. The struct/class has one or two fields all of which are floating
4914 class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
4974 class HexagonABIInfo : public ABIInfo {
4991 class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
5134 class SparcV9ABIInfo : public ABIInfo {
5358 class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo {
