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85 #define HPC3_SDCFG_D1   0x00006 /* Cycles to spend in D1 state */
86 #define HPC3_SDCFG_D2 0x00038 /* Cycles to spend in D2 state */
87 #define HPC3_SDCFG_D3 0x001c0 /* Cycles to spend in D3 state */
96 #define HPC3_SPCFG_P3 0x0003 /* Cycles to spend in P3 state */
97 #define HPC3_SPCFG_P2W 0x001c /* Cycles to spend in P2 state for writes */
98 #define HPC3_SPCFG_P2R 0x01e0 /* Cycles to spend in P2 state for reads */
99 #define HPC3_SPCFG_P1 0x0e00 /* Cycles to spend in P1 state */
137 #define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
138 #define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
139 #define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
147 #define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
148 #define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
149 #define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
236 /* Cycles to spend in D3 for reads */
239 /* Cycles to spend in D4 for reads */
242 /* Cycles to spend in D5 for reads */
245 /* Cycles to spend in D3 for writes */
248 /* Cycles to spend in D4 for writes */
251 /* Cycles to spend in D5 for writes */
266 /* Cycles to spend in P2 state for reads */
269 /* Cycles to spend in P3 state for reads */
272 /* Cycles to spend in P4 state for reads */
275 /* Cycles to spend in P2 state for writes */
278 /* Cycles to spend in P3 state for writes */
281 /* Cycles to spend in P4 state for writes */