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87  * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
92 #define UART_LCR_EPAR 0x10 /* Even parity select */
189 #define UART_FCTR_IRDA 0x04 /* IrDa data encode select */
190 #define UART_FCTR_TX_INT 0x08 /* Tx interrupt type select */
191 #define UART_FCTR_TRGA 0x00 /* Tx/Rx 550 trigger table select */
192 #define UART_FCTR_TRGB 0x10 /* Tx/Rx 650 trigger table select */
193 #define UART_FCTR_TRGC 0x20 /* Tx/Rx 654 trigger table select */
194 #define UART_FCTR_TRGD 0x30 /* Tx/Rx 850 programmable trigger select */
196 #define UART_FCTR_RX 0x00 /* Programmable trigger mode select */
197 #define UART_FCTR_TX 0x80 /* Programmable trigger mode select */
202 #define UART_EMSR 7 /* Extended Mode Select Register */
203 #define UART_EMSR_FIFO_COUNT 0x01 /* Rx/Tx select */
204 #define UART_EMSR_ALT_COUNT 0x02 /* Alternating count select */
236 #define UART_CKS 0x03 /* Clock Select Register */
269 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */
319 #define UART_OMAP_OSC_12M_SEL 0x13 /* OMAP1510 12MHz osc select */