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1268 :ref:`atomicrmw <i_atomicrmw>`, :ref:`fence <i_fence>`,
1275 :ref:`fence <i_fence>` instructions treat these orderings somewhat
4775 '``fence``' Instruction
4783 fence [singlethread] <ordering> ; yields {void}
4788 The '``fence``' instruction is used to introduce happens-before edges
4794 '``fence``' instructions take an :ref:`ordering <ordering>` argument which
4801 A fence A which has (at least) ``release`` ordering semantics
4802 *synchronizes with* a fence B with (at least) ``acquire`` ordering
4808 ``fence``, one (but not both) of the atomic operations X or Y might
4810 still *synchronize-with* the explicit ``fence`` and establish the
4813 A ``fence`` which has ``seq_cst`` ordering, in addition to having both
4818 that the fence only synchronizes with other fences in the same thread.
4826 fence acquire ; yields {void}
4827 fence singlethread seq_cst ; yields {void}