Lines Matching refs:Reg
66 unsigned Reg = *AI;
67 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
68 KillIndices[Reg] = BBSize;
69 DefIndices[Reg] = ~0u;
81 unsigned Reg = *AI;
82 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
83 KillIndices[Reg] = BBSize;
84 DefIndices[Reg] = ~0u;
100 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) {
101 if (KillIndices[Reg] != ~0u) {
102 // If Reg is currently live, then mark that it can't be renamed as
105 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
106 KillIndices[Reg] = Count;
107 } else if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) {
112 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
116 DefIndices[Reg] = InsertPosIndex;
172 unsigned Reg = MO.getReg();
173 if (Reg == 0) continue;
181 if (!Classes[Reg] && NewRC)
182 Classes[Reg] = NewRC;
183 else if (!NewRC || Classes[Reg] != NewRC)
184 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
187 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) {
188 // If an alias of the reg is used during the live range, give up.
194 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
199 if (Classes[Reg] != reinterpret_cast<TargetRegisterClass *>(-1))
200 RegRefs.insert(std::make_pair(Reg, &MO));
203 if (!KeepRegs.test(Reg)) {
204 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
235 unsigned Reg = MO.getReg();
236 if (Reg == 0) continue;
241 DefIndices[Reg] = Count;
242 KillIndices[Reg] = ~0u;
243 assert(((KillIndices[Reg] == ~0u) !=
244 (DefIndices[Reg] == ~0u)) &&
245 "Kill and Def maps aren't consistent for Reg!");
246 KeepRegs.reset(Reg);
247 Classes[Reg] = 0;
248 RegRefs.erase(Reg);
250 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
259 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR)
266 unsigned Reg = MO.getReg();
267 if (Reg == 0) continue;
276 if (!Classes[Reg] && NewRC)
277 Classes[Reg] = NewRC;
278 else if (!NewRC || Classes[Reg] != NewRC)
279 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
281 RegRefs.insert(std::make_pair(Reg, &MO));
284 if (KillIndices[Reg] == ~0u) {
285 KillIndices[Reg] = Count;
286 DefIndices[Reg] = ~0u;
287 assert(((KillIndices[Reg] == ~0u) !=
288 (DefIndices[Reg] == ~0u)) &&
289 "Kill and Def maps aren't consistent for Reg!");
292 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) {
435 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) {
436 if (KillIndices[Reg] == ~0u)
437 DEBUG(dbgs() << " " << TRI->getName(Reg));
579 unsigned Reg = MO.getReg();
580 if (Reg == 0) continue;
581 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) {
585 if (MO.isDef() && Reg != AntiDepReg)
586 ForbidRegs.push_back(Reg);
632 // liveness information for the anti-dependence reg is now
