Lines Matching full:regskilled
85 RegVector regsDefined, regsDead, regsKilled;
108 // regsKilled and regsLiveOut.
109 RegSet regsKilled;
116 // regsKilled and regsLiveOut.
133 if (regsKilled.count(Reg) || regsLiveOut.count(Reg))
364 regsKilled.clear();
691 regsKilled.clear();
988 addRegWithSubRegs(regsKilled, Reg);
1053 if (MInfo.regsKilled.count(Reg))
1108 set_union(MInfo.regsKilled, regsKilled);
1109 set_subtract(regsLive, regsKilled); regsKilled.clear();
1267 if (MInfo.regsKilled.count(*I)) {
