Lines Matching defs:N1
255 SDValue SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2);
256 SDValue SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2,
259 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
267 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
269 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
579 SDValue N0, N1, N2;
580 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
586 SDValue N0, SDValue N1) {
589 if (isa<ConstantSDNode>(N1)) {
594 cast<ConstantSDNode>(N1));
600 N0.getOperand(0), N1);
606 if (N1.getOpcode() == Opc && isa<ConstantSDNode>(N1.getOperand(1))) {
611 cast<ConstantSDNode>(N1.getOperand(1)),
613 return DAG.getNode(Opc, DL, VT, N1.getOperand(0), OpNode);
615 if (N1.hasOneUse()) {
618 N1.getOperand(0), N0);
620 return DAG.getNode(Opc, DL, VT, OpNode, N1.getOperand(1));
836 SDValue N1 = Op.getOperand(1);
838 if (N0 == N1)
841 NN1 = PromoteOperand(N1, PVT, Replace1);
853 ReplaceLoadWithPromotedLoad(N1.getNode(), NN1.getNode());
1236 SDValue N1 = N->getOperand(1);
1239 if (isa<ConstantSDNode>(N0) || !isa<ConstantSDNode>(N1)) {
1240 SDValue Ops[] = { N1, N0 };
1362 SDValue combineShlAddConstant(SDLoc DL, SDValue N0, SDValue N1,
1377 return DAG.getNode(ISD::ADD, DL, VT, N0, N1);
1385 SDValue N1 = N->getOperand(1);
1387 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1396 if (ISD::isBuildVectorAllZeros(N1.getNode()))
1399 return N1;
1405 if (N1.getOpcode() == ISD::UNDEF)
1406 return N1;
1412 return DAG.getNode(ISD::ADD, SDLoc(N), VT, N1, N0);
1431 SDValue RADD = ReassociateOps(ISD::ADD, SDLoc(N), N0, N1);
1437 return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1, N0.getOperand(1));
1439 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1440 cast<ConstantSDNode>(N1.getOperand(0))->isNullValue())
1441 return DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, N1.getOperand(1));
1443 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
1444 return N1.getOperand(0);
1446 if (N0.getOpcode() == ISD::SUB && N1 == N0.getOperand(1))
1449 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
1450 N0 == N1.getOperand(1).getOperand(0))
1451 return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1.getOperand(0),
1452 N1.getOperand(1).getOperand(1));
1454 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
1455 N0 == N1.getOperand(1).getOperand(1))
1456 return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1.getOperand(0),
1457 N1.getOperand(1).getOperand(0));
1459 if ((N1.getOpcode() == ISD::SUB || N1.getOpcode() == ISD::ADD) &&
1460 N1.getOperand(0).getOpcode() == ISD::SUB &&
1461 N0 == N1.getOperand(0).getOperand(1))
1462 return DAG.getNode(N1.getOpcode(), SDLoc(N), VT,
1463 N1.getOperand(0).getOperand(0), N1.getOperand(1));
1466 if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB) {
1469 SDValue N10 = N1.getOperand(0);
1470 SDValue N11 = N1.getOperand(1);
1475 DAG.getNode(ISD::ADD, SDLoc(N1), VT, N01, N11));
1488 DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
1493 return DAG.getNode(ISD::OR, SDLoc(N), VT, N0, N1);
1499 SDValue Result = combineShlAddConstant(SDLoc(N), N0, N1, DAG);
1502 if (N1.getOpcode() == ISD::SHL && N1.getNode()->hasOneUse()) {
1503 SDValue Result = combineShlAddConstant(SDLoc(N), N1, N0, DAG);
1508 if (N1.getOpcode() == ISD::SHL &&
1509 N1.getOperand(0).getOpcode() == ISD::SUB)
1511 dyn_cast<ConstantSDNode>(N1.getOperand(0).getOperand(0)))
1515 N1.getOperand(0).getOperand(1),
1516 N1.getOperand(1)));
1522 return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1,
1527 if (N1.getOpcode() == ISD::AND) {
1528 SDValue AndOp0 = N1.getOperand(0);
1529 ConstantSDNode *AndOp1 = dyn_cast<ConstantSDNode>(N1->getOperand(1));
1547 return DAG.getNode(ISD::SUB, DL, VT, N1, ZExt);
1555 SDValue N1 = N->getOperand(1);
1557 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1562 return CombineTo(N, DAG.getNode(ISD::ADD, SDLoc(N), VT, N0, N1),
1568 return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N1, N0);
1581 DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
1586 return CombineTo(N, DAG.getNode(ISD::OR, SDLoc(N), VT, N0, N1),
1596 SDValue N1 = N->getOperand(1);
1599 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1604 N1, N0, CarryIn);
1608 return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N0, N1);
1638 SDValue N1 = N->getOperand(1);
1640 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
1641 ConstantSDNode *N1C1 = N1.getOpcode() != ISD::ADD ? 0 :
1642 dyn_cast<ConstantSDNode>(N1.getOperand(1).getNode());
1651 if (ISD::isBuildVectorAllZeros(N1.getNode()))
1657 if (N0 == N1)
1668 return DAG.getNode(ISD::XOR, SDLoc(N), VT, N1, N0);
1670 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
1671 return N1.getOperand(1);
1673 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
1676 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
1679 if (N1.getOpcode() == ISD::ADD && N0C && N1C1) {
1683 N1.getOperand(0));
1689 N0.getOperand(1).getOperand(0) == N1)
1695 N0.getOperand(1).getOperand(1) == N1)
1701 N0.getOperand(1).getOperand(1) == N1)
1708 if (N1.getOpcode() == ISD::UNDEF)
1709 return N1;
1720 N1))
1731 SDValue N1 = N->getOperand(1);
1733 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1738 return CombineTo(N, DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, N1),
1743 if (N0 == N1)
1755 return CombineTo(N, DAG.getNode(ISD::XOR, SDLoc(N), VT, N1, N0),
1764 SDValue N1 = N->getOperand(1);
1769 return DAG.getNode(ISD::SUBC, SDLoc(N), N->getVTList(), N0, N1);
1792 SDValue N1 = N->getOperand(1);
1796 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
1808 N1IsConst = isConstantSplatVector(N1.getNode(), ConstValue1);
1812 N1IsConst = dyn_cast<ConstantSDNode>(N1) != 0;
1813 ConstValue1 = N1IsConst? (dyn_cast<ConstantSDNode>(N1))->getAPIntValue() : APInt();
1818 return DAG.FoldConstantArithmetic(ISD::MUL, VT, N0.getNode(), N1.getNode());
1822 return DAG.getNode(ISD::MUL, SDLoc(N), VT, N1, N0);
1825 return N1;
1856 N1, N0.getOperand(1));
1871 Sh = N0; Y = N1;
1872 } else if (N1.getOpcode() == ISD::SHL &&
1873 isa<ConstantSDNode>(N1.getOperand(1)) &&
1874 N1.getNode()->hasOneUse()) {
1875 Sh = N1; Y = N0;
1892 N0.getOperand(0), N1),
1893 DAG.getNode(ISD::MUL, SDLoc(N1), VT,
1894 N0.getOperand(1), N1));
1897 SDValue RMUL = ReassociateOps(ISD::MUL, SDLoc(N), N0, N1);
1906 SDValue N1 = N->getOperand(1);
1908 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
1930 if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
1931 return DAG.getNode(ISD::UDIV, SDLoc(N), N1.getValueType(),
1932 N0, N1);
1982 if (N1.getOpcode() == ISD::UNDEF)
1983 return N1;
1990 SDValue N1 = N->getOperand(1);
1992 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2010 if (N1.getOpcode() == ISD::SHL) {
2011 if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
2013 EVT ADDVT = N1.getOperand(1).getValueType();
2015 N1.getOperand(1),
2034 if (N1.getOpcode() == ISD::UNDEF)
2035 return N1;
2042 SDValue N1 = N->getOperand(1);
2044 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2053 if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
2054 return DAG.getNode(ISD::UREM, SDLoc(N), VT, N0, N1);
2060 SDValue Div = DAG.getNode(ISD::SDIV, SDLoc(N), VT, N0, N1);
2065 OptimizedDiv, N1);
2076 if (N1.getOpcode() == ISD::UNDEF)
2077 return N1;
2084 SDValue N1 = N->getOperand(1);
2086 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2097 if (N1.getOpcode() == ISD::SHL) {
2098 if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
2101 DAG.getNode(ISD::ADD, SDLoc(N), VT, N1,
2113 SDValue Div = DAG.getNode(ISD::UDIV, SDLoc(N), VT, N0, N1);
2118 OptimizedDiv, N1);
2129 if (N1.getOpcode() == ISD::UNDEF)
2130 return N1;
2137 SDValue N1 = N->getOperand(1);
2138 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2144 return N1;
2151 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
2162 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1);
2163 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1);
2164 N1N1,
2165 DAG.getConstant(SimpleSize, getShiftAmountTy(N1.getValueType())));
2166 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1);
2175 SDValue N1 = N->getOperand(1);
2176 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2182 return N1;
2187 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
2198 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1);
2199 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1);
2200 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1,
2201 DAG.getConstant(SimpleSize, getShiftAmountTy(N1.getValueType())));
2202 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1);
2282 // Compute the high part as N1.
2312 // Compute the high part as N1.
2362 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
2364 assert(N0.getOpcode() == N1.getOpcode() && "Bad input!");
2388 Op0VT == N1.getOperand(0).getValueType() &&
2392 N0.getOperand(0), N1.getOperand(0));
2403 N0.getOperand(1) == N1.getOperand(1)) {
2406 N0.getOperand(0), N1.getOperand(0));
2423 SDValue In1 = N1.getOperand(0);
2446 N1.getOperand(1).getOpcode() == ISD::UNDEF) {
2448 ShuffleVectorSDNode *SVN1 = cast<ShuffleVectorSDNode>(N1);
2450 assert(N0.getOperand(0).getValueType() == N1.getOperand(1).getValueType() &&
2469 N0.getOperand(0), N1.getOperand(0));
2481 SDValue N1 = N->getOperand(1);
2484 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2485 EVT VT = N1.getValueType();
2496 if (ISD::isBuildVectorAllZeros(N1.getNode()))
2497 return N1;
2501 return N1;
2502 if (ISD::isBuildVectorAllOnes(N1.getNode()))
2507 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
2514 return DAG.getNode(ISD::AND, SDLoc(N), VT, N1, N0);
2523 SDValue RAND = ReassociateOps(ISD::AND, SDLoc(N), N0, N1);
2530 return N1;
2566 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2568 } else if (BuildVectorSDNode *Vector = dyn_cast<BuildVectorSDNode>(N1)) {
2650 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
2697 if (N0.getOpcode() == N1.getOpcode()) {
2714 unsigned BitWidth = N1.getValueType().getScalarType().getSizeInBits();
2715 if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth,
2736 unsigned BitWidth = N1.getValueType().getScalarType().getSizeInBits();
2737 if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth,
2824 if (N0.getOpcode() == ISD::ADD && N1.getOpcode() == ISD::SRL &&
2833 if (ConstantSDNode *SRLI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
2856 SDValue DAGCombiner::MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
2871 std::swap(N0, N1);
2872 if (N1.getOpcode() == ISD::AND && N1.getOperand(0).getOpcode() == ISD::SHL)
2873 std::swap(N0, N1);
2884 if (N1.getOpcode() == ISD::AND) {
2885 if (!N1.getNode()->hasOneUse())
2887 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
2890 N1 = N1.getOperand(0);
2894 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
2895 std::swap(N0, N1);
2896 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL)
2899 !N1.getNode()->hasOneUse())
2903 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
2921 SDValue N10 = N1->getOperand(0);
3023 SDValue DAGCombiner::MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) {
3042 if (N1.getOpcode() == ISD::OR &&
3060 if (!isBSwapHWordElement(N1, Parts))
3095 SDValue N1 = N->getOperand(1);
3098 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3099 EVT VT = N1.getValueType();
3108 return N1;
3109 if (ISD::isBuildVectorAllZeros(N1.getNode()))
3115 if (ISD::isBuildVectorAllOnes(N1.getNode()))
3116 return N1;
3121 (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)) {
3130 return DAG.getNode(ISD::OR, SDLoc(N), VT, N1, N0);
3136 return N1;
3139 return N1;
3142 SDValue BSwap = MatchBSwapHWord(N, N0, N1);
3145 BSwap = MatchBSwapHWordLow(N, N0, N1);
3150 SDValue ROR = ReassociateOps(ISD::OR, SDLoc(N), N0, N1);
3161 N0.getOperand(0), N1),
3165 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
3209 if (N0.getOpcode() == N1.getOpcode()) {
3216 N1.getOpcode() == ISD::AND &&
3218 N1.getOperand(1).getOpcode() == ISD::Constant &&
3220 (N0.getNode()->hasOneUse() || N1.getNode()->hasOneUse())) {
3226 cast<ConstantSDNode>(N1.getOperand(1))->getAPIntValue();
3229 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) {
3231 N0.getOperand(0), N1.getOperand(0));
3238 if (SDNode *Rot = MatchRotate(N0, N1, SDLoc(N)))
3411 SDValue N1 = N->getOperand(1);
3414 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3424 return N1;
3425 if (ISD::isBuildVectorAllZeros(N1.getNode()))
3430 if (N0.getOpcode() == ISD::UNDEF && N1.getOpcode() == ISD::UNDEF)
3435 if (N1.getOpcode() == ISD::UNDEF)
3436 return N1;
3442 return DAG.getNode(ISD::XOR, SDLoc(N), VT, N1, N0);
3447 SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1);
3488 LHS = DAG.getNode(ISD::XOR, SDLoc(LHS), VT, LHS, N1); // LHS = ~LHS
3489 RHS = DAG.getNode(ISD::XOR, SDLoc(RHS), VT, RHS, N1); // RHS = ~RHS
3500 LHS = DAG.getNode(ISD::XOR, SDLoc(LHS), VT, LHS, N1); // LHS = ~LHS
3501 RHS = DAG.getNode(ISD::XOR, SDLoc(RHS), VT, RHS, N1); // RHS = ~RHS
3508 N0->getOperand(1) == N1) {
3512 return DAG.getNode(ISD::AND, SDLoc(N), VT, NotX, N1);
3528 if (N0 == N1)
3532 if (N0.getOpcode() == N1.getOpcode()) {
3617 SDValue N1 = N->getOperand(1);
3619 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3643 if (N1.getOpcode() == ISD::TRUNCATE &&
3644 N1.getOperand(0).getOpcode() == ISD::AND &&
3645 N1.hasOneUse() && N1.getOperand(0).hasOneUse()) {
3646 SDValue N101 = N1.getOperand(0).getOperand(1);
3648 EVT TruncVT = N1.getValueType();
3649 SDValue N100 = N1.getOperand(0).getOperand(0);
3672 DAG.getConstant(c1 + c2, N1.getValueType()));
3696 DAG.getConstant(c1 + c2, N1.getValueType()));
3715 DAG.getConstant(c2-c1, N1.getValueType()));
3719 DAG.getConstant(c1-c2, N1.getValueType()));
3726 if (N1C && N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1)) {
3747 SDValue N1 = N->getOperand(1);
3749 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3770 if (N1C && N0.getOpcode() == ISD::SHL && N1 == N0.getOperand(1)) {
3830 if (N1.getOpcode() == ISD::TRUNCATE &&
3831 N1.getOperand(0).getOpcode() == ISD::AND &&
3832 N1.hasOneUse() && N1.getOperand(0).hasOneUse()) {
3833 SDValue N101 = N1.getOperand(0).getOperand(1);
3835 EVT TruncVT = N1.getValueType();
3836 SDValue N100 = N1.getOperand(0).getOperand(0);
3879 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0, N1);
3892 SDValue N1 = N->getOperand(1);
3894 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3923 DAG.getConstant(c1 + c2, N1.getValueType()));
3948 if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1 &&
3979 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0.getOperand(0), N1);
4018 if (N1.getOpcode() == ISD::TRUNCATE &&
4019 N1.getOperand(0).getOpcode() == ISD::AND &&
4020 N1.hasOneUse() && N1.getOperand(0).hasOneUse()) {
4021 SDValue N101 = N1.getOperand(0).getOperand(1);
4023 EVT TruncVT = N1.getValueType();
4024 SDValue N100 = N1.getOperand(0).getOperand(0);
4137 SDValue N1 = N->getOperand(1);
4140 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
4146 if (N1 == N2)
4147 return N1;
4150 return N1;
4185 return DAG.getNode(ISD::OR, SDLoc(N), VT, NOTNode, N1);
4189 return DAG.getNode(ISD::AND, SDLoc(N), VT, N0, N1);
4192 if (VT == MVT::i1 && (N0 == N1 || (N1C && N1C->getAPIntValue() == 1)))
4197 return DAG.getNode(ISD::AND, SDLoc(N), VT, N0, N1);
4200 if (SimplifySelectOps(N, N1, N2))
4213 N1, N2, N0.getOperand(2));
4214 N1, N2);
4222 SDValue N1 = N->getOperand(1);
4239 N1 == LHS && N2.getOpcode() == ISD::SUB && N1 == N2.getOperand(1))
4242 N2 == LHS && N1.getOpcode() == ISD::SUB && N2 == N1.getOperand(1))
4243 isAbs = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode());
4262 SDValue N1 = N->getOperand(1);
4274 N0, N1, CC, SDLoc(N), false);
4297 return SimplifySelectCC(SDLoc(N), N0, N1, N2, N3, CC);
5287 SDValue N1 = N->getOperand(1);
5289 EVT EVT = cast<VTSDNode>(N1)->getVT();
5295 return DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), VT, N0, N1);
5305 N0.getOperand(0), N1);
5314 return DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT, N00, N1);
5389 BSwap, N1);
5897 SDValue N1 = N->getOperand(1);
5899 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
5910 return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0, N1);
5913 return DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N0);
5920 isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Options) == 2)
5922 GetNegatedExpression(N1, DAG, LegalOperations));
5926 return DAG.getNode(ISD::FSUB, SDLoc(N), VT, N1,
5935 N0.getOperand(1), N1));
5950 N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
5955 N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0)
5969 if (CFP00 && !CFP01 && N0.getOperand(1) == N1) {
5974 N1, NewCFP);
5978 if (CFP01 && !CFP00 && N0.getOperand(0) == N1) {
5983 N1, NewCFP);
5987 if (CFP00 && !CFP01 && N1.getOpcode() == ISD::FADD &&
5988 N1.getOperand(0) == N1.getOperand(1) &&
5989 N0.getOperand(1) == N1.getOperand(0)) {
5998 if (CFP01 && !CFP00 && N1.getOpcode() == ISD::FADD &&
5999 N1.getOperand(0) == N1.getOperand(1) &&
6000 N0.getOperand(0) == N1.getOperand(0)) {
6009 if (N1.getOpcode() == ISD::FMUL) {
6010 ConstantFPSDNode *CFP10 = dyn_cast<ConstantFPSDNode>(N1.getOperand(0));
6011 ConstantFPSDNode *CFP11 = dyn_cast<ConstantFPSDNode>(N1.getOperand(1));
6014 if (CFP10 && !CFP11 && N1.getOperand(1) == N0) {
6023 if (CFP11 && !CFP10 && N1.getOperand(0) == N0) {
6035 N1.getOperand(1) == N0.getOperand(0)) {
6040 N1.getOperand(1), NewCFP);
6046 N1.getOperand(0) == N0.getOperand(0)) {
6051 N1.getOperand(0), NewCFP);
6059 (N0.getOperand(0) == N1))
6061 N1, DAG.getConstantFP(3.0, VT));
6064 if (N1.getOpcode() == ISD::FADD && AllowNewFpConst) {
6065 ConstantFPSDNode *CFP10 = dyn_cast<ConstantFPSDNode>(N1.getOperand(0));
6067 if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
6068 N1.getOperand(0) == N0)
6075 N0.getOpcode() == ISD::FADD && N1.getOpcode() == ISD::FADD &&
6077 N1.getOperand(0) == N1.getOperand(1) &&
6078 N0.getOperand(0) == N1.getOperand(0))
6093 N0.getOperand(0), N0.getOperand(1), N1);
6097 if (N1.getOpcode() == ISD::FMUL && N1->hasOneUse())
6099 N1.getOperand(0), N1.getOperand(1), N0);
6107 SDValue N1 = N->getOperand(1);
6109 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6121 return DAG.getNode(ISD::FSUB, SDLoc(N), VT, N0, N1);
6129 if (isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Options))
6130 return GetNegatedExpression(N1, DAG, LegalOperations);
6132 return DAG.getNode(ISD::FNEG, dl, VT, N1);
6135 if (isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Options))
6137 GetNegatedExpression(N1, DAG, LegalOperations));
6144 if (N0 == N1)
6147 if (N1.getOpcode() == ISD::FADD) {
6148 SDValue N10 = N1->getOperand(0);
6149 SDValue N11 = N1->getOperand(1);
6171 DAG.getNode(ISD::FNEG, dl, VT, N1));
6175 if (N1.getOpcode() == ISD::FMUL && N1->hasOneUse())
6178 N1.getOperand(0)),
6179 N1.getOperand(1), N0);
6189 DAG.getNode(ISD::FNEG, dl, VT, N1));
6198 SDValue N1 = N->getOperand(1);
6200 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6212 return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N0, N1);
6215 return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N1, N0);
6219 return N1;
6222 ISD::isBuildVectorAllZeros(N1.getNode()))
6223 return N1;
6238 if (char RHSNeg = isNegatibleForFree(N1, LegalOperations, TLI,
6245 GetNegatedExpression(N1, DAG, LegalOperations));
6255 N0.getOperand(1), N1));
6262 SDValue N1 = N->getOperand(1);
6265 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6276 return DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N2);
6282 return DAG.getNode(ISD::FMA, SDLoc(N), VT, N1, N0, N2);
6290 DAG.getNode(ISD::FADD, dl, VT, N1, N2.getOperand(1)));
6300 DAG.getNode(ISD::FMUL, dl, VT, N1, N0.getOperand(1)),
6322 N1, DAG.getConstantFP(1.0, VT)));
6329 N1, DAG.getConstantFP(-1.0, VT)));
6337 SDValue N1 = N->getOperand(1);
6339 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6351 return DAG.getNode(ISD::FDIV, SDLoc(N), VT, N0, N1);
6375 if (char RHSNeg = isNegatibleForFree(N1, LegalOperations, TLI,
6382 GetNegatedExpression(N1, DAG, LegalOperations));
6391 SDValue N1 = N->getOperand(1);
6393 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6398 return DAG.getNode(ISD::FREM, SDLoc(N), VT, N0, N1);
6405 SDValue N1 = N->getOperand(1);
6407 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
6411 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1);
6433 N0.getOperand(0), N1);
6436 if (N1.getOpcode() == ISD::FABS)
6440 if (N1.getOpcode() == ISD::FCOPYSIGN)
6442 N0, N1.getOperand(1));
6446 if (N1.getOpcode() == ISD::FP_EXTEND || N1.getOpcode() == ISD::FP_ROUND)
6448 N0, N1.getOperand(0));
6580 SDValue N1 = N->getOperand(1);
6586 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), VT, N0, N1);
6604 N0.getOperand(0), N1);
6798 SDValue N1 = N->getOperand(1);
6809 if (N1.getOpcode() == ISD::SETCC &&
6811 N1.getOperand(0).getValueType())) {
6813 Chain, N1.getOperand(2),
6814 N1.getOperand(0), N1.getOperand(1), N2);
6817 if ((N1.hasOneUse() && N1.getOpcode() == ISD::SRL) ||
6818 ((N1.getOpcode() == ISD::TRUNCATE && N1.hasOneUse()) &&
6819 (N1.getOperand(0).hasOneUse() &&
6820 N1.getOperand(0).getOpcode() == ISD::SRL))) {
6822 if (N1.getOpcode() == ISD::TRUNCATE) {
6824 Trunc = N1.getNode();
6825 N1 = N1.getOperand(0);
6845 SDValue Op0 = N1.getOperand(0);
6846 SDValue Op1 = N1.getOperand(1);
6875 DAG.ReplaceAllUsesOfValueWith(N1, SetCC);
6876 removeFromWorkList(N1.getNode());
6877 DAG.DeleteNode(N1.getNode());
6884 // Restore N1 if the above transformation doesn't match.
6885 N1 = N->getOperand(1);
6890 if (N1.hasOneUse() && N1.getOpcode() == ISD::XOR) {
6891 SDNode *TheXor = N1.getNode();
6905 DAG.ReplaceAllUsesOfValueWith(N1, Tmp);
6927 EVT SetCCVT = N1.getValueType();
6936 DAG.ReplaceAllUsesOfValueWith(N1, SetCC);
6937 removeFromWorkList(N1.getNode());
6938 DAG.DeleteNode(N1.getNode());
7690 SDValue N1 = Value.getOperand(1);
7691 unsigned BitWidth = N1.getValueSizeInBits();
7692 APInt Imm = cast<ConstantSDNode>(N1)->getAPIntValue();
9282 SDValue N1 = N->getOperand(1);
9315 Ops.push_back(N1.getOperand(FirstElt - N0.getNumOperands()));
9333 SDValue N1 = N->getOperand(1);
9338 if (N0.getOpcode() == ISD::UNDEF && N1.getOpcode() == ISD::UNDEF)
9344 if (N0 == N1) {
9368 return DAG.getVectorShuffle(VT, SDLoc(N), N1, DAG.getUNDEF(VT),
9373 if (N1.getOpcode() == ISD::UNDEF) {
9385 return DAG.getVectorShuffle(VT, SDLoc(N), N0, N1, &NewMask[0]);
9431 (N1.getOpcode() == ISD::UNDEF ||
9432 (N1.getOpcode() == ISD::CONCAT_VECTORS &&
9433 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()))) {
9444 N1.getOpcode() == ISD::UNDEF) {
9627 SDValue N1, SDValue N2){
9630 SDValue SCC = SimplifySelectCC(DL, N0.getOperand(0), N0.getOperand(1), N1, N2,
9769 /// SimplifySelectCC - Simplify an expression of the form (N0 cond N1) ? N2 : N3
9771 SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
9778 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
9784 N0, N1, CC, DL, false);
9796 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) {
9850 N0, N1, CC);
9957 N0, N1, CC);
9965 SCC = DAG.getSetCC(SDLoc(N0), MVT::i1, N0, N1, CC);
9990 SDValue Res = DAG.getSetCC(DL, getSetCCResultType(XType), N0, N1, CC);
10060 SDValue N1, ISD::CondCode Cond,
10064 return TLI.SimplifySetCC(VT, N0, N1, Cond, foldBooleans, DagCombineInfo, DL);
