Lines Matching refs:desc
68 cl::desc("Disable cycle-level precision during preRA scheduling"));
74 cl::desc("Disable regpressure priority in sched=list-ilp"));
77 cl::desc("Disable live use priority in sched=list-ilp"));
80 cl::desc("Disable virtual register cycle interference checks"));
83 cl::desc("Disable physreg def-use affinity"));
86 cl::desc("Disable no-stall priority in sched=list-ilp"));
89 cl::desc("Disable critical path priority in sched=list-ilp"));
92 cl::desc("Disable scheduled-height priority in sched=list-ilp"));
95 cl::desc("Disable scheduler's two-address hack"));
99 cl::desc("Number of instructions to allow ahead of the critical path "
104 cl::desc("Average inst/cycle whan no target itinerary exists."));
306 const MCInstrDesc Desc = TII->get(Opcode);
307 const TargetRegisterClass *RC = TII->getRegClass(Desc, Idx, TRI, MF);
