Lines Matching full:opinfo
5763 /// OpInfo describes the operand.
5768 SDISelAsmOperandInfo &OpInfo) {
5777 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5778 OpInfo.ConstraintVT);
5781 if (OpInfo.ConstraintVT != MVT::Other) {
5785 if (OpInfo.Type == InlineAsm::isInput &&
5786 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
5791 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
5792 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5793 RegVT, OpInfo.CallOperand);
5794 OpInfo.ConstraintVT = RegVT;
5795 } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
5800 RegVT = MVT::getIntegerVT(OpInfo.ConstraintVT.getSizeInBits());
5801 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5802 RegVT, OpInfo.CallOperand);
5803 OpInfo.ConstraintVT = RegVT;
5807 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT);
5811 EVT ValueVT = OpInfo.ConstraintVT;
5817 if (OpInfo.ConstraintVT == MVT::Other)
5842 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5850 if (OpInfo.ConstraintVT == MVT::Other)
5858 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5883 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
5888 switch (OpInfo.Type) {
5891 if (OpInfo.isIndirect) {
5892 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5908 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5917 if (OpInfo.CallOperandVal) {
5918 if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
5919 OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
5921 OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
5924 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), *TLI, TD).
5928 OpInfo.ConstraintVT = OpVT;
5931 if (OpInfo.isIndirect)
5934 for (unsigned j = 0, ee = OpInfo.Codes.size(); j != ee; ++j) {
5936 CType = TLI->getConstraintType(OpInfo.Codes[j]);
5957 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5963 if (OpInfo.hasMatchingInput()) {
5964 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
5966 if (OpInfo.ConstraintVT != Input.ConstraintVT) {
5968 TLI->getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5969 OpInfo.ConstraintVT);
5973 if ((OpInfo.ConstraintVT.isInteger() !=
5980 Input.ConstraintVT = OpInfo.ConstraintVT;
5985 TLI->ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
5987 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5988 OpInfo.Type == InlineAsm::isClobber)
5993 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5994 !OpInfo.isIndirect) {
5995 assert((OpInfo.isMultipleAlternative ||
5996 (OpInfo.Type == InlineAsm::isInput)) &&
6009 const Value *OpVal = OpInfo.CallOperandVal;
6012 OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
6024 OpInfo.CallOperand, StackSlot,
6027 OpInfo.CallOperand = StackSlot;
6031 OpInfo.CallOperandVal = 0;
6034 OpInfo.isIndirect = true;
6039 if (OpInfo.ConstraintType == TargetLowering::C_Register)
6040 GetRegistersForValue(DAG, *TLI, getCurSDLoc(), OpInfo);
6046 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
6050 if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
6051 GetRegistersForValue(DAG, *TLI, getCurSDLoc(), OpInfo);
6079 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
6082 TLI->ComputeConstraintToUse(OpInfo, SDValue());
6088 if (OpInfo.ConstraintType == TargetLowering::C_Memory ||
6089 OpInfo.ConstraintType == TargetLowering::C_Other) {
6090 if (OpInfo.Type == InlineAsm::isInput)
6092 else if (OpInfo.Type == InlineAsm::isOutput)
6094 else if (OpInfo.Type == InlineAsm::isClobber)
6110 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
6112 switch (OpInfo.Type) {
6114 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
6115 OpInfo.ConstraintType != TargetLowering::C_Register) {
6117 assert(OpInfo.isIndirect && "Memory output must be indirect operand");
6123 AsmNodeOperands.push_back(OpInfo.CallOperand);
6131 if (OpInfo.AssignedRegs.Regs.empty()) {
6135 Twine(OpInfo.ConstraintCode) + "'");
6141 if (OpInfo.isIndirect) {
6142 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
6143 OpInfo.CallOperandVal));
6148 RetValRegs.append(OpInfo.AssignedRegs);
6153 OpInfo.AssignedRegs
6154 .AddInlineAsmOperands(OpInfo.isEarlyClobber
6161 SDValue InOperandVal = OpInfo.CallOperand;
6163 if (OpInfo
6166 unsigned OperandNo = OpInfo.getMatchedOperand();
6186 if (OpInfo.isIndirect) {
6216 true, OpInfo.getMatchedOperand(),
6227 OpInfo.getMatchedOperand());
6235 if (OpInfo.ConstraintType == TargetLowering::C_Other &&
6236 OpInfo.isIndirect)
6237 OpInfo.ConstraintType = TargetLowering::C_Memory;
6239 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
6241 TLI->LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
6247 Twine(OpInfo.ConstraintCode) + "'");
6260 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
6261 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
6273 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
6274 OpInfo.ConstraintType == TargetLowering::C_Register) &&
6278 if (OpInfo.isIndirect) {
6283 Twine(OpInfo.ConstraintCode) + "'");
6288 if (OpInfo.AssignedRegs.Regs.empty()) {
6292 Twine(OpInfo.ConstraintCode) + "'");
6296 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurSDLoc(),
6299 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
6306 if (!OpInfo.AssignedRegs.Regs.empty())
6307 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_Clobber,
