Lines Matching refs:ISD
98 /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
99 /// (ISD::AssertSext).
104 ISD::NodeType AssertOp = ISD::DELETED_NODE) {
135 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
136 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
142 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
156 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
157 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
160 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
161 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
168 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
169 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
172 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
193 if (AssertOp != ISD::DELETED_NODE)
196 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
198 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
204 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
207 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
211 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
219 /// extra bits are known to be zero (ISD::AssertZext) or sign extended from
220 /// ValueVT (ISD::AssertSext).
265 ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL,
283 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
289 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
295 return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
304 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
324 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
328 return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val);
341 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
368 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
376 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
381 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
388 ISD::TRUNCATE, DL, ValueVT, Val);
390 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
424 SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val,
434 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
439 Parts[0] = DAG.getNode(ISD::BITCAST, DL,
451 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
453 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
457 Part0 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part0);
458 Part1 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part1);
483 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
492 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
500 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size());
505 //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
513 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
519 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
523 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
548 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
553 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
757 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
767 return DAG.getNode(ISD::MERGE_VALUES, dl,
788 ISD::NodeType ExtendKind =
789 TLI.isZExtFree(Val, RegisterVT)? ISD::ZERO_EXTEND: ISD::ANY_EXTEND;
823 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0], NumRegs);
915 SDValue Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
933 if (Root.getOpcode() != ISD::EntryToken) {
945 Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
1112 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
1165 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
1192 SmallVector<ISD::OutputArg, 8> Outs;
1216 SDValue Add = DAG.getNode(ISD::ADD, getCurSDLoc(),
1226 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
1237 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1242 ExtendKind = ISD::SIGN_EXTEND;
1245 ExtendKind = ISD::ZERO_EXTEND;
1247 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
1258 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1264 if (ExtendKind == ISD::SIGN_EXTEND)
1266 else if (ExtendKind == ISD::ZERO_EXTEND)
1270 Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
1396 ISD::CondCode Condition;
1404 Condition = ISD::SETEQ; // silence warning.
1416 CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
1500 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1502 if (Cases[0].CC == ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1527 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
1590 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()),
1611 CB.CC == ISD::SETEQ)
1614 CB.CC == ISD::SETEQ) {
1616 Cond = DAG.getNode(ISD::XOR, dl, CondLHS.getValueType(), CondLHS, True);
1620 assert(CB.CC == ISD::SETCC_INVALID &&
1631 ISD::SETULE);
1633 SDValue SUB = DAG.getNode(ISD::SUB, dl,
1636 DAG.getConstant(High-Low, VT), ISD::SETULE);
1659 Cond = DAG.getNode(ISD::XOR, dl, Cond.getValueType(), Cond, True);
1662 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
1669 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
1683 SDValue BrJumpTable = DAG.getNode(ISD::BR_JT, getCurSDLoc(),
1699 SDValue Sub = DAG.getNode(ISD::SUB, getCurSDLoc(), VT, SwitchOp,
1723 ISD::SETUGT);
1733 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1738 BrCond = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrCond,
1751 SDValue Sub = DAG.getNode(ISD::SUB, getCurSDLoc(), VT, SwitchOp,
1760 ISD::SETUGT);
1797 SDValue BrRange = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1802 BrRange = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, CopyTo,
1828 ISD::SETEQ);
1835 ISD::SETNE);
1838 SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurSDLoc(), VT,
1842 SDValue AndOp = DAG.getNode(ISD::AND, getCurSDLoc(),
1847 ISD::SETNE);
1855 SDValue BrAnd = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1867 BrAnd = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrAnd,
1899 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
1940 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
1996 SDValue Or = DAG.getNode(ISD::OR, DL, VT, CondLHS,
2000 ISD::SETEQ);
2011 SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other,
2016 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond,
2070 ISD::CondCode CC;
2073 CC = ISD::SETEQ;
2076 CC = ISD::SETCC_INVALID;
2104 (TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
2105 TLI.isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
2351 CaseBlock CB(ISD::SETULT, SV, C, NULL, TrueBB, FalseBB, CR.CaseBB);
2381 if (!TLI->isOperationLegal(ISD::SHL, TLI->getPointerTy()))
2567 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
2634 DAG.setRoot(DAG.getNode(ISD::BRIND, getCurSDLoc(),
2645 setValue(&I, DAG.getNode(ISD::FNEG, getCurSDLoc(),
2650 visitBinary(I, ISD::FSUB);
2674 Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2);
2681 Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2);
2705 setValue(&I, DAG.getNode(ISD::SDIV, getCurSDLoc(), Op1.getValueType(),
2717 ISD::CondCode Opcode = getICmpCondCode(predicate);
2731 ISD::CondCode Condition = getFCmpCondCode(predicate);
2748 ISD::NodeType OpCode = Cond.getValueType().isVector() ?
2749 ISD::VSELECT : ISD::SELECT;
2760 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
2769 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N));
2777 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N));
2785 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N));
2793 setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurSDLoc(),
2802 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurSDLoc(), DestVT, N));
2809 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurSDLoc(), DestVT, N));
2816 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurSDLoc(), DestVT, N));
2823 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N));
2830 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N));
2856 setValue(&I, DAG.getNode(ISD::BITCAST, getCurSDLoc(),
2868 setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
2878 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
2923 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(),
2931 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(),
2939 bool Src1U = Src1.getOpcode() == ISD::UNDEF;
2940 bool Src2U = Src2.getOpcode() == ISD::UNDEF;
2948 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
2951 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
3024 Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurSDLoc(), VT,
3064 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
3071 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
3113 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3148 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3167 N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N,
3185 OffsVal = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(),
3191 N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N,
3210 IdxN = DAG.getNode(ISD::SHL, getCurSDLoc(),
3215 IdxN = DAG.getNode(ISD::MUL, getCurSDLoc(),
3220 N = DAG.getNode(ISD::ADD, getCurSDLoc(),
3247 AllocSize = DAG.getNode(ISD::MUL, getCurSDLoc(), IntPtr,
3260 AllocSize = DAG.getNode(ISD::ADD, getCurSDLoc(),
3265 AllocSize = DAG.getNode(ISD::AND, getCurSDLoc(),
3271 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurSDLoc(),
3333 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3338 SDValue A = DAG.getNode(ISD::ADD, getCurSDLoc(),
3351 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3359 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3397 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3402 SDValue Add = DAG.getNode(ISD::ADD, getCurSDLoc(), PtrVT, Ptr,
3411 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3437 return DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops, 3);
3453 DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, dl,
3475 ISD::NodeType NT;
3478 case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break;
3479 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break;
3480 case AtomicRMWInst::Sub: NT = ISD::ATOMIC_LOAD_SUB; break;
3481 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break;
3482 case AtomicRMWInst::Nand: NT = ISD::ATOMIC_LOAD_NAND; break;
3483 case AtomicRMWInst::Or: NT = ISD::ATOMIC_LOAD_OR; break;
3484 case AtomicRMWInst::Xor: NT = ISD::ATOMIC_LOAD_XOR; break;
3485 case AtomicRMWInst::Max: NT = ISD::ATOMIC_LOAD_MAX; break;
3486 case AtomicRMWInst::Min: NT = ISD::ATOMIC_LOAD_MIN; break;
3487 case AtomicRMWInst::UMax: NT = ISD::ATOMIC_LOAD_UMAX; break;
3488 case AtomicRMWInst::UMin: NT = ISD::ATOMIC_LOAD_UMIN; break;
3527 DAG.setRoot(DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops, 3));
3544 DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,
3579 DAG.getAtomic(ISD::ATOMIC_STORE, dl, VT,
3618 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
3619 Info.opc == ISD::INTRINSIC_W_CHAIN)
3647 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(),
3650 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(),
3653 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurSDLoc(),
3668 Result = DAG.getNode(ISD::BITCAST, getCurSDLoc(), VT, Result);
3683 SDValue t1 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3685 SDValue t2 = DAG.getNode(ISD::OR, dl, MVT::i32, t1,
3687 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, t2);
3698 SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3700 SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0,
3702 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
3704 return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
3726 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
3728 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
3731 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3732 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
3735 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
3747 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3749 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3751 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3752 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3763 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3765 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3767 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3768 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3770 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3771 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
3785 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3787 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3789 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3790 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3792 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3793 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
3795 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3796 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
3798 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3799 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
3801 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3802 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
3807 SDValue t13 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, TwoToFracPartOfX);
3808 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
3809 DAG.getNode(ISD::ADD, dl, MVT::i32,
3814 return DAG.getNode(ISD::FEXP, dl, Op.getValueType(), Op);
3823 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
3827 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
3843 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3845 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3847 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3848 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3860 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3862 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3864 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3865 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3867 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3868 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3870 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3871 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
3885 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3887 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3889 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3890 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3892 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3893 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3895 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3896 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
3898 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3899 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
3901 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3902 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
3906 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, LogOfMantissa);
3910 return DAG.getNode(ISD::FLOG, dl, Op.getValueType(), Op);
3919 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
3937 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3939 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3941 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3942 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3954 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3956 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3958 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3959 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3961 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3962 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3964 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3965 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
3980 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3982 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
3984 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3985 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
3987 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3988 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3990 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3991 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
3993 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3994 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
3996 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3997 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
4001 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log2ofMantissa);
4005 return DAG.getNode(ISD::FLOG2, dl, Op.getValueType(), Op);
4014 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
4018 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
4034 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4036 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4038 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4039 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4050 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4052 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
4054 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4055 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4057 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4058 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
4071 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4073 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
4075 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4076 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4078 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4079 SDValue t5 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
4081 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4082 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4084 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4085 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t8,
4089 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log10ofMantissa);
4093 return DAG.getNode(ISD::FLOG10, dl, Op.getValueType(), Op);
4102 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
4105 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
4106 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, Op, t1);
4109 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
4121 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4123 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4125 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4126 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4137 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4139 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4141 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4142 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4144 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4145 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4158 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4160 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4162 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4163 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4165 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4166 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4168 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4169 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4171 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4172 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
4174 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
4175 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
4180 SDValue t13 = DAG.getNode(ISD::BITCAST, dl, MVT::i32,
4182 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
4183 DAG.getNode(ISD::ADD, dl, MVT::i32,
4188 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op);
4210 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, RHS,
4212 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
4215 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
4216 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
4219 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
4231 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4233 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4235 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4236 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4247 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4249 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4251 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4252 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4254 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4255 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4268 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4270 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4272 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4273 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4275 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4276 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4278 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4279 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4281 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4282 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
4284 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
4285 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
4289 SDValue t13 = DAG.getNode(ISD::BITCAST, dl,MVT::i32,TwoToFractionalPartOfX);
4290 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
4291 DAG.getNode(ISD::ADD, dl, MVT::i32,
4296 return DAG.getNode(ISD::FPOW, dl, LHS.getValueType(), LHS, RHS);
4331 Res = DAG.getNode(ISD::FMUL, DL,Res.getValueType(), Res, CurSquare);
4336 CurSquare = DAG.getNode(ISD::FMUL, DL, CurSquare.getValueType(),
4343 Res = DAG.getNode(ISD::FDIV, DL, LHS.getValueType(),
4350 return DAG.getNode(ISD::FPOWI, DL, LHS.getValueType(), LHS, RHS);
4356 if (N.getOpcode() != ISD::TRUNCATE)
4360 if (Ext.getOpcode() == ISD::AssertZext ||
4361 Ext.getOpcode() == ISD::AssertSext) {
4363 if (CFR.getOpcode() == ISD::CopyFromReg)
4365 if (CFR.getOpcode() == ISD::TRUNCATE)
4397 if (N.getOpcode() == ISD::CopyFromReg)
4470 setValue(&I, DAG.getNode(ISD::RETURNADDR, sdl, TLI->getPointerTy(),
4474 setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl, TLI->getPointerTy(),
4695 DAG.setRoot(DAG.getNode(ISD::EH_RETURN, sdl,
4707 SDValue Offset = DAG.getNode(ISD::ADD, sdl,
4709 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, sdl,
4712 SDValue FA = DAG.getNode(ISD::FRAMEADDR, sdl,
4715 setValue(&I, DAG.getNode(ISD::ADD, sdl, TLI->getPointerTy(),
4741 SDValue Op = DAG.getNode(ISD::EH_SJLJ_SETJMP, sdl,
4749 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_LONGJMP, sdl, MVT::Other,
4804 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, &ShOps[0], 2);
4806 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt);
4807 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, sdl, DestVT,
4821 Res = DAG.getNode(ISD::INSERT_SUBVECTOR, sdl, DestVT,
4835 Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, sdl, DestVT,
4850 ISD::CvtCode Code = ISD::CVT_INVALID;
4853 case Intrinsic::convertff: Code = ISD::CVT_FF; break;
4854 case Intrinsic::convertfsi: Code = ISD::CVT_FS; break;
4855 case Intrinsic::convertfui: Code = ISD::CVT_FU; break;
4856 case Intrinsic::convertsif: Code = ISD::CVT_SF; break;
4857 case Intrinsic::convertuif: Code = ISD::CVT_UF; break;
4858 case Intrinsic::convertss: Code = ISD::CVT_SS; break;
4859 case Intrinsic::convertsu: Code = ISD::CVT_SU; break;
4860 case Intrinsic::convertus: Code = ISD::CVT_US; break;
4861 case Intrinsic::convertuu: Code = ISD::CVT_UU; break;
4909 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
4910 case Intrinsic::fabs: Opcode = ISD::FABS; break;
4911 case Intrinsic::sin: Opcode = ISD::FSIN; break;
4912 case Intrinsic::cos: Opcode = ISD::FCOS; break;
4913 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
4914 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
4915 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
4916 case Intrinsic::rint: Opcode = ISD::FRINT; break;
4917 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
4926 setValue(&I, DAG.getNode(ISD::FMA, sdl,
4936 setValue(&I, DAG.getNode(ISD::FMA, sdl,
4942 SDValue Mul = DAG.getNode(ISD::FMUL, sdl,
4946 SDValue Add = DAG.getNode(ISD::FADD, sdl,
4955 setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, sdl,
4959 setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, sdl,
4964 DAG.setRoot(DAG.getNode(ISD::PCMARKER, sdl, MVT::Other, getRoot(), Tmp));
4969 Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl,
4977 setValue(&I, DAG.getNode(ISD::BSWAP, sdl,
4985 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UNDEF,
4993 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTLZ : ISD::CTLZ_ZERO_UNDEF,
5000 setValue(&I, DAG.getNode(ISD::CTPOP, sdl, Ty, Arg));
5005 Res = DAG.getNode(ISD::STACKSAVE, sdl,
5013 DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, sdl, MVT::Other, getRoot(), Res));
5075 Res = DAG.getNode(ISD::INIT_TRAMPOLINE, sdl, MVT::Other, Ops, 6);
5081 setValue(&I, DAG.getNode(ISD::ADJUST_TRAMPOLINE, sdl,
5099 setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, sdl, MVT::i32));
5112 ISD::NodeType Op = (Intrinsic == Intrinsic::trap) ?
5113 ISD::TRAP : ISD::DEBUGTRAP;
5137 ISD::NodeType Op;
5140 case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;
5141 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break;
5142 case Intrinsic::usub_with_overflow: Op = ISD::USUBO; break;
5143 case Intrinsic::ssub_with_overflow: Op = ISD::SSUBO; break;
5144 case Intrinsic::umul_with_overflow: Op = ISD::UMULO; break;
5145 case Intrinsic::smul_with_overflow: Op = ISD::SMULO; break;
5162 DAG.setRoot(DAG.getMemIntrinsicNode(ISD::PREFETCH, sdl,
5196 unsigned Opcode = (IsStart ? ISD::LIFETIME_START : ISD::LIFETIME_END);
5230 SmallVector<ISD::OutputArg, 4> Outs;
5346 SDValue Add = DAG.getNode(ISD::ADD, getCurSDLoc(), PtrVT,
5356 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
5361 DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
5518 ISD::SETNE);
5591 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurSDLoc(),
5599 if (visitUnaryFloatCall(I, ISD::FABS))
5605 if (visitUnaryFloatCall(I, ISD::FSIN))
5611 if (visitUnaryFloatCall(I, ISD::FCOS))
5620 if (visitUnaryFloatCall(I, ISD::FSQRT))
5626 if (visitUnaryFloatCall(I, ISD::FFLOOR))
5632 if (visitUnaryFloatCall(I, ISD::FNEARBYINT))
5638 if (visitUnaryFloatCall(I, ISD::FCEIL))
5644 if (visitUnaryFloatCall(I, ISD::FRINT))
5650 if (visitUnaryFloatCall(I, ISD::FTRUNC))
5656 if (visitUnaryFloatCall(I, ISD::FLOG2))
5662 if (visitUnaryFloatCall(I, ISD::FEXP2))
5792 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5801 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
6054 // AsmNodeOperands - The operands for the ISD::INLINEASM node.
6319 Chain = DAG.getNode(ISD::INLINEASM, getCurSDLoc(),
6340 Val = DAG.getNode(ISD::BITCAST, getCurSDLoc(),
6348 Val = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), ResultType, Val);
6384 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
6391 DAG.setRoot(DAG.getNode(ISD::VASTART, getCurSDLoc(),
6409 DAG.setRoot(DAG.getNode(ISD::VAEND, getCurSDLoc(),
6416 DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurSDLoc(),
6439 ISD::InputArg MyFlags;
6465 ISD::ArgFlagsTy Flags;
6498 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
6501 ExtendKind = ISD::SIGN_EXTEND;
6503 ExtendKind = ISD::ZERO_EXTEND;
6520 (ExtendKind != ISD::ANY_EXTEND &&
6530 ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
6573 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6575 AssertOp = ISD::AssertSext;
6577 AssertOp = ISD::AssertZext;
6597 SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL,
6618 assert((Op.getOpcode() != ISD::CopyFromReg ||
6656 SmallVector<ISD::InputArg, 16> Ins;
6666 ISD::ArgFlagsTy Flags;
6669 ISD::InputArg RetArg(Flags, RegisterVT, true, 0, 0);
6684 ISD::ArgFlagsTy Flags;
6717 ISD::InputArg MyFlags(Flags, RegisterVT, isArgValueUsed,
6762 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6803 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6805 AssertOp = ISD::AssertSext;
6807 AssertOp = ISD::AssertZext;
6830 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::BUILD_PAIR) {
6840 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::CopyFromReg) {
