Lines Matching refs:ISD
591 static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
592 memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
593 CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
594 CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
595 CCs[RTLIB::OEQ_F128] = ISD::SETEQ;
596 CCs[RTLIB::UNE_F32] = ISD::SETNE;
597 CCs[RTLIB::UNE_F64] = ISD::SETNE;
598 CCs[RTLIB::UNE_F128] = ISD::SETNE;
599 CCs[RTLIB::OGE_F32] = ISD::SETGE;
600 CCs[RTLIB::OGE_F64] = ISD::SETGE;
601 CCs[RTLIB::OGE_F128] = ISD::SETGE;
602 CCs[RTLIB::OLT_F32] = ISD::SETLT;
603 CCs[RTLIB::OLT_F64] = ISD::SETLT;
604 CCs[RTLIB::OLT_F128] = ISD::SETLT;
605 CCs[RTLIB::OLE_F32] = ISD::SETLE;
606 CCs[RTLIB::OLE_F64] = ISD::SETLE;
607 CCs[RTLIB::OLE_F128] = ISD::SETLE;
608 CCs[RTLIB::OGT_F32] = ISD::SETGT;
609 CCs[RTLIB::OGT_F64] = ISD::SETGT;
610 CCs[RTLIB::OGT_F128] = ISD::SETGT;
611 CCs[RTLIB::UO_F32] = ISD::SETNE;
612 CCs[RTLIB::UO_F64] = ISD::SETNE;
613 CCs[RTLIB::UO_F128] = ISD::SETNE;
614 CCs[RTLIB::O_F32] = ISD::SETEQ;
615 CCs[RTLIB::O_F64] = ISD::SETEQ;
616 CCs[RTLIB::O_F128] = ISD::SETEQ;
676 for (unsigned IM = (unsigned)ISD::PRE_INC;
677 IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
683 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
684 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
688 setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
693 setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
694 setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
695 setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
696 setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
697 setOperationAction(ISD::ConstantFP, MVT::f128, Expand);
700 setOperationAction(ISD::FLOG , MVT::f16, Expand);
701 setOperationAction(ISD::FLOG2, MVT::f16, Expand);
702 setOperationAction(ISD::FLOG10, MVT::f16, Expand);
703 setOperationAction(ISD::FEXP , MVT::f16, Expand);
704 setOperationAction(ISD::FEXP2, MVT::f16, Expand);
705 setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
706 setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
707 setOperationAction(ISD::FCEIL, MVT::f16, Expand);
708 setOperationAction(ISD::FRINT, MVT::f16, Expand);
709 setOperationAction(ISD::FTRUNC, MVT::f16, Expand);
710 setOperationAction(ISD::FLOG , MVT::f32, Expand);
711 setOperationAction(ISD::FLOG2, MVT::f32, Expand);
712 setOperationAction(ISD::FLOG10, MVT::f32, Expand);
713 setOperationAction(ISD::FEXP , MVT::f32, Expand);
714 setOperationAction(ISD::FEXP2, MVT::f32, Expand);
715 setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
716 setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
717 setOperationAction(ISD::FCEIL, MVT::f32, Expand);
718 setOperationAction(ISD::FRINT, MVT::f32, Expand);
719 setOperationAction(ISD::FTRUNC, MVT::f32, Expand);
720 setOperationAction(ISD::FLOG , MVT::f64, Expand);
721 setOperationAction(ISD::FLOG2, MVT::f64, Expand);
722 setOperationAction(ISD::FLOG10, MVT::f64, Expand);
723 setOperationAction(ISD::FEXP , MVT::f64, Expand);
724 setOperationAction(ISD::FEXP2, MVT::f64, Expand);
725 setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
726 setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
727 setOperationAction(ISD::FCEIL, MVT::f64, Expand);
728 setOperationAction(ISD::FRINT, MVT::f64, Expand);
729 setOperationAction(ISD::FTRUNC, MVT::f64, Expand);
730 setOperationAction(ISD::FLOG , MVT::f128, Expand);
731 setOperationAction(ISD::FLOG2, MVT::f128, Expand);
732 setOperationAction(ISD::FLOG10, MVT::f128, Expand);
733 setOperationAction(ISD::FEXP , MVT::f128, Expand);
734 setOperationAction(ISD::FEXP2, MVT::f128, Expand);
735 setOperationAction(ISD::FFLOOR, MVT::f128, Expand);
736 setOperationAction(ISD::FNEARBYINT, MVT::f128, Expand);
737 setOperationAction(ISD::FCEIL, MVT::f128, Expand);
738 setOperationAction(ISD::FRINT, MVT::f128, Expand);
739 setOperationAction(ISD::FTRUNC, MVT::f128, Expand);
741 // Default ISD::TRAP to expand (which turns it into abort).
742 setOperationAction(ISD::TRAP, MVT::Other, Expand);
747 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
768 case ISD::FDIV:
769 case ISD::FREM:
770 case ISD::SDIV:
771 case ISD::UDIV:
772 case ISD::SREM:
773 case ISD::UREM:
1124 SmallVectorImpl<ISD::OutputArg> &Outs,
1133 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1136 ExtendKind = ISD::SIGN_EXTEND;
1138 ExtendKind = ISD::ZERO_EXTEND;
1144 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
1154 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1165 Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true, 0, 0));
1194 case Add: return ISD::ADD;
1195 case FAdd: return ISD::FADD;
1196 case Sub: return ISD::SUB;
1197 case FSub: return ISD::FSUB;
1198 case Mul: return ISD::MUL;
1199 case FMul: return ISD::FMUL;
1200 case UDiv: return ISD::UDIV;
1201 case SDiv: return ISD::UDIV;
1202 case FDiv: return ISD::FDIV;
1203 case URem: return ISD::UREM;
1204 case SRem: return ISD::SREM;
1205 case FRem: return ISD::FREM;
1206 case Shl: return ISD::SHL;
1207 case LShr: return ISD::SRL;
1208 case AShr: return ISD::SRA;
1209 case And: return ISD::AND;
1210 case Or: return ISD::OR;
1211 case Xor: return ISD::XOR;
1213 case Load: return ISD::LOAD;
1214 case Store: return ISD::STORE;
1219 case Trunc: return ISD::TRUNCATE;
1220 case ZExt: return ISD::ZERO_EXTEND;
1221 case SExt: return ISD::SIGN_EXTEND;
1222 case FPToUI: return ISD::FP_TO_UINT;
1223 case FPToSI: return ISD::FP_TO_SINT;
1224 case UIToFP: return ISD::UINT_TO_FP;
1225 case SIToFP: return ISD::SINT_TO_FP;
1226 case FPTrunc: return ISD::FP_ROUND;
1227 case FPExt: return ISD::FP_EXTEND;
1228 case PtrToInt: return ISD::BITCAST;
1229 case IntToPtr: return ISD::BITCAST;
1230 case BitCast: return ISD::BITCAST;
1231 case ICmp: return ISD::SETCC;
1232 case FCmp: return ISD::SETCC;
1235 case Select: return ISD::SELECT;
1239 case ExtractElement: return ISD::EXTRACT_VECTOR_ELT;
1240 case InsertElement: return ISD::INSERT_VECTOR_ELT;
1241 case ShuffleVector: return ISD::VECTOR_SHUFFLE;
1242 case ExtractValue: return ISD::MERGE_VALUES;
1243 case InsertValue: return ISD::MERGE_VALUES;
