Lines Matching refs:v2f64
70 addRegisterClass(MVT::v2f64, &AArch64::VPR128RegClass);283 setOperationAction(ISD::BUILD_VECTOR, MVT::v2f64, Custom);294 setOperationAction(ISD::SETCC, MVT::v2f64, Custom);3327 (VT == MVT::v2f64 && SplatBitSize == 64)) {