Lines Matching defs:Reg0
470 unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0);
471 O << ARMInstPrinter::getRegisterName(Reg0) << ", ";;
1316 // Add 's' bit operand (always reg0 for this)
1345 // Add 's' bit operand (always reg0 for this)
1354 // Add 's' bit operand (always reg0 for this)
1365 // Add 's' bit operand (always reg0 for this)
1409 // Add 's' bit operand (always reg0 for this)
1446 // Add 's' bit operand (always reg0 for this)
1491 // Add 's' bit operand (always reg0 for this)
1617 // Add 's' bit operand (always reg0 for this)
1666 // Add 's' bit operand (always reg0 for this)
1792 // 's' bit operand (always reg0 for this).
1809 // 's' bit operand (always reg0 for this).
1819 // 's' bit operand (always reg0 for this).
1829 // 's' bit operand (always reg0 for this).
