Lines Matching defs:PredReg
1579 llvm::getInstrPredicate(const MachineInstr *MI, unsigned &PredReg) {
1582 PredReg = 0;
1586 PredReg = MI->getOperand(PIdx+1).getReg();
1609 unsigned PredReg = 0;
1610 ARMCC::CondCodes CC = getInstrPredicate(MI, PredReg);
1612 if (CC == ARMCC::AL || PredReg != ARM::CPSR)
1782 ARMCC::CondCodes Pred, unsigned PredReg,
1801 .addImm((unsigned)Pred).addReg(PredReg).addReg(0)
