Lines Matching defs:PredReg
615 unsigned PredReg = 0;616 ARMCC::CondCodes Pred = getInstrPredicate(&MI, PredReg);639 LO16.addImm(Pred).addReg(PredReg).addReg(0);640 HI16.addImm(Pred).addReg(PredReg).addReg(0);676 LO16.addImm(Pred).addReg(PredReg);677 HI16.addImm(Pred).addReg(PredReg);