Lines Matching full:opcode
326 static const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) {
341 std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode);
342 if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode)
614 unsigned Opcode = MI.getOpcode();
619 bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm;
624 (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) {
648 if (Opcode == ARM::t2MOVi32imm || Opcode == ARM::t2MOVCCi32imm) {
686 unsigned Opcode = MI.getOpcode();
687 switch (Opcode) {
692 unsigned newOpc = Opcode == ARM::VMOVScc ? ARM::VMOVS : ARM::VMOVD;
830 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ?
853 TII->get(Opcode == ARM::tTPsoft ? ARM::tBL : ARM::BL))
863 unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic)
894 bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn);
895 bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn);
903 ? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD)
926 if (Opcode == ARM::MOV_ga_pcrel_ldr)
1004 unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q :
