Lines Matching full:opcode
206 /// 1, 2, 3 or 4. The opcode arrays specify the instructions used for
214 /// be 1, 2, 3 or 4. The opcode arrays specify the instructions used for
222 /// be 2, 3 or 4. The opcode arrays specify the instructions used for
229 /// should be 2, 3 or 4. The opcode array specifies the instructions used
305 // opcode and that it has a immediate integer right operand.
442 unsigned Opcode = MCID.getOpcode();
443 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
458 return TII->isFpMLxInstruction(Opcode);
816 unsigned Opcode = Op->getOpcode();
817 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
852 unsigned Opcode = Op->getOpcode();
853 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
872 unsigned Opcode = Op->getOpcode();
873 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
947 unsigned Opcode = Op->getOpcode();
948 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1356 unsigned Opcode
1357 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1465 unsigned Opcode = 0;
1469 Opcode = ARM::LDR_PRE_IMM;
1473 Opcode = ARM::LDR_POST_IMM;
1477 Opcode = isPre ? ARM::LDR_PRE_REG : ARM::LDR_POST_REG;
1483 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD)
1490 Opcode = isPre ? ARM::LDRSB_PRE : ARM::LDRSB_POST;
1496 Opcode = ARM::LDRB_PRE_IMM;
1500 Opcode = ARM::LDRB_POST_IMM;
1503 Opcode = isPre ? ARM::LDRB_PRE_REG : ARM::LDRB_POST_REG;
1509 if (Opcode == ARM::LDR_PRE_IMM || Opcode == ARM::LDRB_PRE_IMM) {
1514 return CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32,
1521 return CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32,
1539 unsigned Opcode = 0;
1544 Opcode = isPre ? ARM::t2LDR_PRE : ARM::t2LDR_POST;
1548 Opcode = isPre ? ARM::t2LDRSH_PRE : ARM::t2LDRSH_POST;
1550 Opcode = isPre ? ARM::t2LDRH_PRE : ARM::t2LDRH_POST;
1555 Opcode = isPre ? ARM::t2LDRSB_PRE : ARM::t2LDRSB_POST;
1557 Opcode = isPre ? ARM::t2LDRB_PRE : ARM::t2LDRB_POST;
1570 return CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32, MVT::i32,
1684 // Get the register stride update opcode of a VLD/VST instruction that
2175 // operand. It's implicit in the opcode itself.
2339 llvm_unreachable("Unknown so_reg opcode!");
2554 unsigned Opcode = Subtarget->isThumb2() ? ARM::t2ABS : ARM::ABS;
2555 return CurDAG->SelectNodeTo(N, Opcode, VT, ADDSrc0);
