Lines Matching refs:UDIVREM
721 setOperationAction(ISD::UDIVREM, MVT::i32, Custom);724 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);5908 case ISD::UDIVREM: return LowerDivRem(Op, DAG);10748 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) &&