Lines Matching full:pseudo
450 // An operand for the CONSTPOOL_ENTRY pseudo-instruction.
1668 // Atomic pseudo-insts which will be lowered to ldrexd/strexd loops.
1982 // at least be a pseudo instruction expanding to the predicated version
2056 // FIXME: We shouldn't need this pseudo at all. Just using Bcc directly
2627 // Pseudo-instructions for pattern matching the pre-indexed stores. We can't
3189 // Currently, ADDS/SUBS are pseudo opcodes that exist only in the
3194 // FIXME: Eliminate ADDS/SUBS pseudo opcodes after adding tablegen
4125 // Pseudo i64 compares for some floating point compares.
4249 // Pseudo instruction that combines movs + predicated rsbmi
4890 // This is a pseudo inst so that we can get the encoding right,
4912 // These are pseudo-instructions and are lowered to individual MC-insts, so
4942 // eh.sjlj.dispatchsetup pseudo-instruction.
4943 // This pseudo is used for both ARM and Thumb. Any differences are handled when
4944 // the pseudo is expanded (which happens before any passes that need the
4964 // This is a single pseudo instruction, the benefit is that it can be remat'd
4972 // Pseudo instruction that combines movw + movt + add pc (if PIC).
