Lines Matching full:vst1
1561 // VST1 : Vector Store (multiple single elements)
1564 IIC_VST1, "vst1", Dt, "$Vd, $Rn", "", []> {
1571 IIC_VST1x2, "vst1", Dt, "$Vd, $Rn", "", []> {
1591 "vst1", Dt, "$Vd, $Rn!",
1600 "vst1", Dt, "$Vd, $Rn, $Rm",
1609 "vst1", Dt, "$Vd, $Rn!",
1618 "vst1", Dt, "$Vd, $Rn, $Rm",
1639 IIC_VST1x3, "vst1", Dt, "$Vd, $Rn", "", []> {
1647 "vst1", Dt, "$Vd, $Rn!",
1656 "vst1", Dt, "$Vd, $Rn, $Rm",
1681 IIC_VST1x4, "vst1", Dt, "$Vd, $Rn", "",
1690 "vst1", Dt, "$Vd, $Rn!",
1699 "vst1", Dt, "$Vd, $Rn, $Rm",
1951 IIC_VST1ln, "vst1", Dt, "\\{$Vd[$lane]\\}, $Rn", "",
1992 DPR:$Vd, nohash_imm:$lane), IIC_VST1lnu, "vst1", Dt,
2248 // Use vld1/vst1 for unaligned f64 load / store
2262 // Use vld1/vst1 for Q and QQ. Also use them for unaligned v2f64
6097 // VST1 single-lane pseudo-instructions. These need special handling for
6099 def VST1LNdAsm_8 : NEONDataTypeAsmPseudoInst<"vst1${p}", ".8", "$list, $addr",
6101 def VST1LNdAsm_16 : NEONDataTypeAsmPseudoInst<"vst1${p}", ".16", "$list, $addr",
6103 def VST1LNdAsm_32 : NEONDataTypeAsmPseudoInst<"vst1${p}", ".32", "$list, $addr",
6107 NEONDataTypeAsmPseudoInst<"vst1${p}", ".8", "$list, $addr!",
6110 NEONDataTypeAsmPseudoInst<"vst1${p}", ".16", "$list, $addr!",
6113 NEONDataTypeAsmPseudoInst<"vst1${p}", ".32", "$list, $addr!",
6116 NEONDataTypeAsmPseudoInst<"vst1${p}", ".8", "$list, $addr, $Rm",
6120 NEONDataTypeAsmPseudoInst<"vst1${p}", ".16", "$list, $addr, $Rm",
6124 NEONDataTypeAsmPseudoInst<"vst1${p}", ".32", "$list, $addr, $Rm",
