Lines Matching full:registerclass
192 def GPR : RegisterClass<"ARM", [i32], 32, (add (sequence "R%u", 0, 12),
208 def GPRnopc : RegisterClass<"ARM", [i32], 32, (sub GPR, PC)> {
218 def GPRwithAPSR : RegisterClass<"ARM", [i32], 32, (add (sub GPR, PC), APSR_NZCV)> {
230 def GPRsp : RegisterClass<"ARM", [i32], 32, (add SP)>;
236 def rGPR : RegisterClass<"ARM", [i32], 32, (sub GPR, SP, PC)> {
245 def tGPR : RegisterClass<"ARM", [i32], 32, (trunc GPR, 8)>;
248 def hGPR : RegisterClass<"ARM", [i32], 32, (sub GPR, tGPR)>;
254 def tcGPR : RegisterClass<"ARM", [i32], 32, (add R0, R1, R2, R3, R9, R12)> {
262 def CCR : RegisterClass<"ARM", [i32], 32, (add CPSR)> {
271 def SPR : RegisterClass<"ARM", [f32], 32, (add (decimate
277 def SPR_8 : RegisterClass<"ARM", [f32], 32, (sequence "S%u", 0, 15)>;
283 def DPR : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
292 def DPR_VFP2 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
297 def DPR_8 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
301 def QPR : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 128,
309 def QPR_VFP2 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
313 def QPR_8 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
326 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
341 def GPRPair : RegisterClass<"ARM", [untyped], 64, (add Tuples2R)> {
352 def DTriple : RegisterClass<"ARM", [untyped], 64, (add Tuples3D)> {
363 def QQPR : RegisterClass<"ARM", [v4i64], 256, (add Tuples2Q)> {
377 def DQuad : RegisterClass<"ARM", [v4i64], 256,
386 def QQQQPR : RegisterClass<"ARM", [v8i64], 256, (add Tuples2QQ)> {
399 def DPairSpc : RegisterClass<"ARM", [v2i64], 64, (add Tuples2DSpc)>;
407 def DTripleSpc : RegisterClass<"ARM", [untyped], 64, (add Tuples3DSpc)> {
418 def DQuadSpc : RegisterClass<"ARM", [v4i64], 64, (add Tuples3DSpc)>;
