Lines Matching refs:ARMBaseTargetMachine
45 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT,
59 void ARMBaseTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
75 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
101 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
128 ARMPassConfig(ARMBaseTargetMachine *TM, PassManagerBase &PM)
131 ARMBaseTargetMachine &getARMTargetMachine() const {
132 return getTM<ARMBaseTargetMachine>();
147 TargetPassConfig *ARMBaseTargetMachine::createPassConfig(PassManagerBase &PM) {
222 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
