Lines Matching refs:Insn
201 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
203 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
206 unsigned Insn,
209 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
211 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
213 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
215 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
219 unsigned Insn,
222 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
224 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
226 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
228 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
230 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
238 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
240 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn,
276 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
278 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
280 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
282 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
284 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
286 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn,
288 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
290 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
292 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
294 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
296 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
298 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
300 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
302 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
304 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
306 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
308 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
310 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
312 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
314 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
316 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
318 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
320 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
322 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
324 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
326 static DecodeStatus DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address,
330 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
350 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
352 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
354 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
356 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
370 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
372 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
374 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
376 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
392 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst,unsigned Insn,
394 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst,unsigned Insn,
436 uint32_t insn = (bytes[3] << 24) |
442 DecodeStatus result = decodeInstruction(DecoderTableARM32, MI, insn,
452 result = decodeInstruction(DecoderTableVFP32, MI, insn, Address, this, STI);
459 result = decodeInstruction(DecoderTableVFPV832, MI, insn, Address, this, STI);
466 result = decodeInstruction(DecoderTableNEONData32, MI, insn, Address,
478 result = decodeInstruction(DecoderTableNEONLoadStore32, MI, insn, Address,
490 result = decodeInstruction(DecoderTableNEONDup32, MI, insn, Address,
502 result = decodeInstruction(DecoderTablev8NEON32, MI, insn, Address,
1295 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1299 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1300 unsigned CRd = fieldFromInstruction(Insn, 12, 4);
1301 unsigned coproc = fieldFromInstruction(Insn, 8, 4);
1302 unsigned imm = fieldFromInstruction(Insn, 0, 8);
1303 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1304 unsigned U = fieldFromInstruction(Insn, 23, 1);
1440 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn,
1444 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1445 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1446 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1447 unsigned imm = fieldFromInstruction(Insn, 0, 12);
1448 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1449 unsigned reg = fieldFromInstruction(Insn, 25, 1);
1450 unsigned P = fieldFromInstruction(Insn, 24, 1);
1451 unsigned W = fieldFromInstruction(Insn, 21, 1);
1494 if (!fieldFromInstruction(Insn, 23, 1))
1511 switch( fieldFromInstruction(Insn, 5, 2)) {
1527 unsigned amt = fieldFromInstruction(Insn, 7, 5);
1589 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
1593 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1594 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1595 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1596 unsigned type = fieldFromInstruction(Insn, 22, 1);
1597 unsigned imm = fieldFromInstruction(Insn, 8, 4);
1598 unsigned U = ((~fieldFromInstruction(Insn, 23, 1)) & 1) << 8;
1599 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1600 unsigned W = fieldFromInstruction(Insn, 21, 1);
1601 unsigned P = fieldFromInstruction(Insn, 24, 1);
1632 if (!type && fieldFromInstruction(Insn, 8, 4))
1780 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
1784 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1785 unsigned mode = fieldFromInstruction(Insn, 23, 2);
1809 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
1813 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
1814 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1815 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1816 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1819 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
1833 unsigned Insn,
1837 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1838 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1839 unsigned reglist = fieldFromInstruction(Insn, 0, 16);
1897 if (fieldFromInstruction(Insn, 20, 1) == 0) {
1899 if (!(fieldFromInstruction(Insn, 22, 1) == 1 &&
1900 fieldFromInstruction(Insn, 20, 1) == 0))
1904 MCOperand::CreateImm(fieldFromInstruction(Insn, 0, 4)));
1908 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
1923 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
1925 unsigned imod = fieldFromInstruction(Insn, 18, 2);
1926 unsigned M = fieldFromInstruction(Insn, 17, 1);
1927 unsigned iflags = fieldFromInstruction(Insn, 6, 3);
1928 unsigned mode = fieldFromInstruction(Insn, 0, 5);
1934 if (fieldFromInstruction(Insn, 5, 1) != 0 ||
1935 fieldFromInstruction(Insn, 16, 1) != 0 ||
1936 fieldFromInstruction(Insn, 20, 8) != 0x10)
1970 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
1972 unsigned imod = fieldFromInstruction(Insn, 9, 2);
1973 unsigned M = fieldFromInstruction(Insn, 8, 1);
1974 unsigned iflags = fieldFromInstruction(Insn, 5, 3);
1975 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2002 int imm = fieldFromInstruction(Insn, 0, 8);
2012 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
2016 unsigned Rd = fieldFromInstruction(Insn, 8, 4);
2019 imm |= (fieldFromInstruction(Insn, 0, 8) << 0);
2020 imm |= (fieldFromInstruction(Insn, 12, 3) << 8);
2021 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2022 imm |= (fieldFromInstruction(Insn, 26, 1) << 11);
2036 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2040 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2041 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2044 imm |= (fieldFromInstruction(Insn, 0, 12) << 0);
2045 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2063 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2067 unsigned Rd = fieldFromInstruction(Insn, 16, 4);
2068 unsigned Rn = fieldFromInstruction(Insn, 0, 4);
2069 unsigned Rm = fieldFromInstruction(Insn, 8, 4);
2070 unsigned Ra = fieldFromInstruction(Insn, 12, 4);
2071 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2074 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2136 DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2146 unsigned S = fieldFromInstruction(Insn, 26, 1);
2147 unsigned J1 = fieldFromInstruction(Insn, 13, 1);
2148 unsigned J2 = fieldFromInstruction(Insn, 11, 1);
2151 unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
2152 unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
2163 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2167 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2168 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2;
2172 imm |= fieldFromInstruction(Insn, 24, 1) << 1;
2206 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2210 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2211 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2212 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2213 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2214 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2215 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2480 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
2482 unsigned type = fieldFromInstruction(Insn, 8, 4);
2483 unsigned align = fieldFromInstruction(Insn, 4, 2);
2488 unsigned load = fieldFromInstruction(Insn, 21, 1);
2489 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2490 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2493 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
2495 unsigned size = fieldFromInstruction(Insn, 6, 2);
2498 unsigned type = fieldFromInstruction(Insn, 8, 4);
2499 unsigned align = fieldFromInstruction(Insn, 4, 2);
2503 unsigned load = fieldFromInstruction(Insn, 21, 1);
2504 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2505 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2508 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
2510 unsigned size = fieldFromInstruction(Insn, 6, 2);
2513 unsigned align = fieldFromInstruction(Insn, 4, 2);
2516 unsigned load = fieldFromInstruction(Insn, 21, 1);
2517 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2518 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2521 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
2523 unsigned size = fieldFromInstruction(Insn, 6, 2);
2526 unsigned load = fieldFromInstruction(Insn, 21, 1);
2527 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2528 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2531 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
2535 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2536 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2537 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2538 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2539 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2540 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2802 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
2806 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2807 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2808 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2809 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2810 unsigned align = fieldFromInstruction(Insn, 4, 1);
2811 unsigned size = fieldFromInstruction(Insn, 6, 2);
2849 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
2853 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2854 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2855 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2856 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2857 unsigned align = fieldFromInstruction(Insn, 4, 1);
2858 unsigned size = 1 << fieldFromInstruction(Insn, 6, 2);
2897 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
2901 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2902 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2903 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2904 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2905 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
2932 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
2936 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2937 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2938 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2939 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2940 unsigned size = fieldFromInstruction(Insn, 6, 2);
2941 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
2942 unsigned align = fieldFromInstruction(Insn, 4, 1);
2987 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn,
2991 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2992 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2993 unsigned imm = fieldFromInstruction(Insn, 0, 4);
2994 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
2995 imm |= fieldFromInstruction(Insn, 24, 1) << 7;
2996 imm |= fieldFromInstruction(Insn, 8, 4) << 8;
2997 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
2998 unsigned Q = fieldFromInstruction(Insn, 6, 1);
3032 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
3036 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3037 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3038 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3039 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3040 unsigned size = fieldFromInstruction(Insn, 18, 2);
3075 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
3079 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3080 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3081 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3082 Rn |= fieldFromInstruction(Insn, 7, 1) << 4;
3083 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3084 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3085 unsigned op = fieldFromInstruction(Insn, 6, 1);
3111 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3115 unsigned dst = fieldFromInstruction(Insn, 8, 3);
3116 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3234 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
3238 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3239 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3268 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3296 unsigned addrmode = fieldFromInstruction(Insn, 4, 2);
3297 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2;
3298 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6;
3305 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
3309 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3310 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3311 unsigned U = fieldFromInstruction(Insn, 9, 1);
3312 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3342 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3369 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
3373 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3374 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3375 unsigned imm = fieldFromInstruction(Insn, 0, 12);
3404 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3434 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
3438 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3439 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3440 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3463 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3473 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
3477 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3478 unsigned U = fieldFromInstruction(Insn, 23, 1);
3479 int imm = fieldFromInstruction(Insn, 0, 12);
3621 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
3625 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3626 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3627 unsigned addr = fieldFromInstruction(Insn, 0, 8);
3628 addr |= fieldFromInstruction(Insn, 9, 1) << 8;
3630 unsigned load = fieldFromInstruction(Insn, 20, 1);
3660 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3708 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
3710 unsigned imm = fieldFromInstruction(Insn, 0, 7);
3719 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
3724 unsigned Rdm = fieldFromInstruction(Insn, 0, 3);
3725 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3;
3733 unsigned Rm = fieldFromInstruction(Insn, 3, 4);
3744 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
3746 unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2;
3747 unsigned flags = fieldFromInstruction(Insn, 0, 3);
3755 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
3758 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3759 unsigned add = fieldFromInstruction(Insn, 4, 1);
3802 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
3806 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3807 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3818 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
3822 unsigned pred = fieldFromInstruction(Insn, 22, 4);
3824 unsigned opc = fieldFromInstruction(Insn, 4, 28);
3839 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3843 unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
3844 brtarget |= fieldFromInstruction(Insn, 11, 1) << 19;
3845 brtarget |= fieldFromInstruction(Insn, 13, 1) << 18;
3846 brtarget |= fieldFromInstruction(Insn, 16, 6) << 12;
3847 brtarget |= fieldFromInstruction(Insn, 26, 1) << 20;
3948 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
3952 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3953 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3954 unsigned pred = fieldFromInstruction(Insn, 28, 4);
3969 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
3973 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3974 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
3975 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3976 unsigned pred = fieldFromInstruction(Insn, 28, 4);
3994 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
3998 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3999 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4000 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4001 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4002 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4003 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4019 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
4023 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4024 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4025 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4026 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4027 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4028 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4029 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4047 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
4051 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4052 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4053 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4054 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4055 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4056 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4072 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
4076 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4077 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4078 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4079 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4080 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4081 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4097 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
4101 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4102 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4103 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4104 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4105 unsigned size = fieldFromInstruction(Insn, 10, 2);
4113 if (fieldFromInstruction(Insn, 4, 1))
4115 index = fieldFromInstruction(Insn, 5, 3);
4118 if (fieldFromInstruction(Insn, 5, 1))
4120 index = fieldFromInstruction(Insn, 6, 2);
4121 if (fieldFromInstruction(Insn, 4, 1))
4125 if (fieldFromInstruction(Insn, 6, 1))
4127 index = fieldFromInstruction(Insn, 7, 1);
4129 switch (fieldFromInstruction(Insn, 4, 2)) {
4164 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
4168 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4169 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4170 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4171 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4172 unsigned size = fieldFromInstruction(Insn, 10, 2);
4180 if (fieldFromInstruction(Insn, 4, 1))
4182 index = fieldFromInstruction(Insn, 5, 3);
4185 if (fieldFromInstruction(Insn, 5, 1))
4187 index = fieldFromInstruction(Insn, 6, 2);
4188 if (fieldFromInstruction(Insn, 4, 1))
4192 if (fieldFromInstruction(Insn, 6, 1))
4194 index = fieldFromInstruction(Insn, 7, 1);
4196 switch (fieldFromInstruction(Insn, 4, 2)) {
4230 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
4234 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4235 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4236 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4237 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4238 unsigned size = fieldFromInstruction(Insn, 10, 2);
4247 index = fieldFromInstruction(Insn, 5, 3);
4248 if (fieldFromInstruction(Insn, 4, 1))
4252 index = fieldFromInstruction(Insn, 6, 2);
4253 if (fieldFromInstruction(Insn, 4, 1))
4255 if (fieldFromInstruction(Insn, 5, 1))
4259 if (fieldFromInstruction(Insn, 5, 1))
4261 index = fieldFromInstruction(Insn, 7, 1);
4262 if (fieldFromInstruction(Insn, 4, 1) != 0)
4264 if (fieldFromInstruction(Insn, 6, 1))
4297 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
4301 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4302 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4303 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4304 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4305 unsigned size = fieldFromInstruction(Insn, 10, 2);
4314 index = fieldFromInstruction(Insn, 5, 3);
4315 if (fieldFromInstruction(Insn, 4, 1))
4319 index = fieldFromInstruction(Insn, 6, 2);
4320 if (fieldFromInstruction(Insn, 4, 1))
4322 if (fieldFromInstruction(Insn, 5, 1))
4326 if (fieldFromInstruction(Insn, 5, 1))
4328 index = fieldFromInstruction(Insn, 7, 1);
4329 if (fieldFromInstruction(Insn, 4, 1) != 0)
4331 if (fieldFromInstruction(Insn, 6, 1))
4361 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
4365 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4366 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4367 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4368 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4369 unsigned size = fieldFromInstruction(Insn, 10, 2);
4378 if (fieldFromInstruction(Insn, 4, 1))
4380 index = fieldFromInstruction(Insn, 5, 3);
4383 if (fieldFromInstruction(Insn, 4, 1))
4385 index = fieldFromInstruction(Insn, 6, 2);
4386 if (fieldFromInstruction(Insn, 5, 1))
4390 if (fieldFromInstruction(Insn, 4, 2))
4392 index = fieldFromInstruction(Insn, 7, 1);
4393 if (fieldFromInstruction(Insn, 6, 1))
4431 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
4435 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4436 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4437 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4438 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4439 unsigned size = fieldFromInstruction(Insn, 10, 2);
4448 if (fieldFromInstruction(Insn, 4, 1))
4450 index = fieldFromInstruction(Insn, 5, 3);
4453 if (fieldFromInstruction(Insn, 4, 1))
4455 index = fieldFromInstruction(Insn, 6, 2);
4456 if (fieldFromInstruction(Insn, 5, 1))
4460 if (fieldFromInstruction(Insn, 4, 2))
4462 index = fieldFromInstruction(Insn, 7, 1);
4463 if (fieldFromInstruction(Insn, 6, 1))
4495 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
4499 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4500 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4501 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4502 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4503 unsigned size = fieldFromInstruction(Insn, 10, 2);
4512 if (fieldFromInstruction(Insn, 4, 1))
4514 index = fieldFromInstruction(Insn, 5, 3);
4517 if (fieldFromInstruction(Insn, 4, 1))
4519 index = fieldFromInstruction(Insn, 6, 2);
4520 if (fieldFromInstruction(Insn, 5, 1))
4524 switch (fieldFromInstruction(Insn, 4, 2)) {
4530 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
4533 index = fieldFromInstruction(Insn, 7, 1);
4534 if (fieldFromInstruction(Insn, 6, 1))
4576 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
4580 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4581 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4582 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4583 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4584 unsigned size = fieldFromInstruction(Insn, 10, 2);
4593 if (fieldFromInstruction(Insn, 4, 1))
4595 index = fieldFromInstruction(Insn, 5, 3);
4598 if (fieldFromInstruction(Insn, 4, 1))
4600 index = fieldFromInstruction(Insn, 6, 2);
4601 if (fieldFromInstruction(Insn, 5, 1))
4605 switch (fieldFromInstruction(Insn, 4, 2)) {
4611 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
4614 index = fieldFromInstruction(Insn, 7, 1);
4615 if (fieldFromInstruction(Insn, 6, 1))
4648 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
4651 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4652 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4653 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4654 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4655 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4674 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
4677 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4678 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4679 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4680 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4681 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4700 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn,
4703 unsigned pred = fieldFromInstruction(Insn, 4, 4);
4704 unsigned mask = fieldFromInstruction(Insn, 0, 4);
4720 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
4724 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4725 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4726 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4727 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4728 unsigned W = fieldFromInstruction(Insn, 21, 1);
4729 unsigned U = fieldFromInstruction(Insn, 23, 1);
4730 unsigned P = fieldFromInstruction(Insn, 24, 1);
4757 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
4761 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4762 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4763 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4764 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4765 unsigned W = fieldFromInstruction(Insn, 21, 1);
4766 unsigned U = fieldFromInstruction(Insn, 23, 1);
4767 unsigned P = fieldFromInstruction(Insn, 24, 1);
4791 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn,
4793 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
4794 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
4797 unsigned Val = fieldFromInstruction(Insn, 0, 8);
4798 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
4799 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
4817 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
4819 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4820 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4);
4821 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4822 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4825 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
4844 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
4846 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
4847 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
4848 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
4849 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
4850 unsigned imm = fieldFromInstruction(Insn, 16, 6);
4851 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
4852 unsigned op = fieldFromInstruction(Insn, 5, 1);
4860 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
4874 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
4876 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
4877 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
4878 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
4879 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
4880 unsigned imm = fieldFromInstruction(Insn, 16, 6);
4881 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
4882 unsigned op = fieldFromInstruction(Insn, 5, 1);
4890 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
4904 static DecodeStatus DecodeImm0_4(MCInst &Inst, unsigned Insn, uint64_t Address,
4907 unsigned Imm = fieldFromInstruction(Insn, 0, 3);
