Lines Matching defs:isAdd
455 bool isAdd = true;
460 isAdd = false;
466 isAdd = false;
470 return isAdd;
753 bool isAdd = true;
762 isAdd = false ; // 'U' bit is set as part of the fixup.
778 isAdd = false;
783 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups);
787 if (isAdd)
808 bool isAdd = Imm8 >= 0;
819 if (isAdd)
833 bool isAdd = true;
839 isAdd = false ; // 'U' bit is set as part of the fixup.
848 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups);
858 if (isAdd)
959 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
968 // {12} = isAdd
978 if (isAdd)
988 // {12} isAdd
1001 // {12} isAdd
1006 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
1016 return Binary | (isAdd << 12) | (isReg << 13);
1022 // {4} isAdd
1026 bool isAdd = MO1.getImm() != 0;
1027 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()) | (isAdd << 4);
1034 // {8} isAdd
1040 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1046 return Imm8 | (isAdd << 8) | (isImm << 9);
1054 // {8} isAdd
1075 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1081 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1131 bool isAdd;
1137 isAdd = false; // 'U' bit is handled as part of the fixup.
1151 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1156 if (isAdd)
