Home | History | Annotate | Download | only in ARM

Lines Matching defs:PredReg

61   unsigned PredReg = 0;
62 ARMCC::CondCodes CC = getInstrPredicate(Tail, PredReg);
109 unsigned PredReg = 0;
110 return getITInstrPredicate(MBBI, PredReg) == ARMCC::AL;
215 ARMCC::CondCodes Pred, unsigned PredReg,
230 .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
237 .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
246 .addImm((unsigned)Pred).addReg(PredReg).addReg(0)
252 .addImm((unsigned)Pred).addReg(PredReg).addReg(0)
438 unsigned PredReg;
439 if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
611 llvm::getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg) {
615 return getInstrPredicate(MI, PredReg);