Lines Matching refs:ISD
54 ISD::ArgFlagsTy ArgFlags, CCState &State);
59 ISD::ArgFlagsTy ArgFlags, CCState &State);
64 ISD::ArgFlagsTy ArgFlags, CCState &State);
69 ISD::ArgFlagsTy ArgFlags, CCState &State);
74 ISD::ArgFlagsTy ArgFlags, CCState &State);
79 ISD::ArgFlagsTy ArgFlags, CCState &State);
84 ISD::ArgFlagsTy ArgFlags, CCState &State) {
133 ISD::ArgFlagsTy ArgFlags, CCState &State) {
171 ISD::ArgFlagsTy ArgFlags, CCState &State) {
189 ISD::ArgFlagsTy ArgFlags, CCState &State) {
214 ISD::ArgFlagsTy ArgFlags, CCState &State) {
245 ISD::ArgFlagsTy ArgFlags, CCState &State) {
261 ISD::ArgFlagsTy ArgFlags, CCState &State) {
287 ISD::ArgFlagsTy Flags, SelectionDAG &DAG,
297 // LowerReturn - Lower ISD::RET. If a struct is larger than 8 bytes and is
303 const SmallVectorImpl<ISD::OutputArg> &Outs,
314 // Analyze return values of ISD::RET
344 /// LowerCallResult - Lower the result values of an ISD::CALL into the
348 /// ISD::CALL.
353 SmallVectorImpl<ISD::InputArg> &Ins,
386 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
388 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
460 ISD::ArgFlagsTy Flags = Outs[i].Flags;
470 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
473 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
476 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
483 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
510 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0],
605 if (Ptr->getOpcode() != ISD::ADD)
609 isInc = (Ptr->getOpcode() == ISD::ADD);
642 ISD::MemIndexedMode &AM,
651 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
667 AM = isInc ? ISD::POST_INC : ISD::POST_DEC;
681 case ISD::INLINEASM: {
754 SDValue ShiftIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index,
756 SDValue JTAddress = DAG.getNode(ISD::ADD, dl, MVT::i32, JumpTableBase,
779 SDValue Sub = DAG.getNode(ISD::SUB, dl, MVT::i32, StackPointer, Size);
815 SmallVectorImpl<ISD::InputArg> &Ins,
845 ISD::ArgFlagsTy Flags = Ins[i].Flags;
906 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOps[0],
945 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i1, LHS, RHS, CC);
946 return DAG.getNode(ISD::SELECT, dl, SVT, Cond, TrueVal, FalseVal);
978 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset),
1082 setOperationAction(ISD::SDIV, MVT::i32, Expand);
1084 setOperationAction(ISD::SREM, MVT::i32, Expand);
1087 setOperationAction(ISD::SDIV, MVT::i64, Expand);
1089 setOperationAction(ISD::SREM, MVT::i64, Expand);
1092 setOperationAction(ISD::UDIV, MVT::i32, Expand);
1095 setOperationAction(ISD::UDIV, MVT::i64, Expand);
1098 setOperationAction(ISD::UREM, MVT::i32, Expand);
1101 setOperationAction(ISD::UREM, MVT::i64, Expand);
1104 setOperationAction(ISD::FDIV, MVT::f32, Expand);
1107 setOperationAction(ISD::FDIV, MVT::f64, Expand);
1109 setOperationAction(ISD::FSQRT, MVT::f32, Expand);
1110 setOperationAction(ISD::FSQRT, MVT::f64, Expand);
1111 setOperationAction(ISD::FSIN, MVT::f32, Expand);
1112 setOperationAction(ISD::FSIN, MVT::f64, Expand);
1116 setOperationAction(ISD::FADD, MVT::f32, Legal);
1117 setOperationAction(ISD::FADD, MVT::f64, Legal);
1118 setOperationAction(ISD::FP_EXTEND, MVT::f32, Legal);
1119 setCondCodeAction(ISD::SETOEQ, MVT::f32, Legal);
1120 setCondCodeAction(ISD::SETOEQ, MVT::f64, Legal);
1121 setCondCodeAction(ISD::SETUEQ, MVT::f32, Legal);
1122 setCondCodeAction(ISD::SETUEQ, MVT::f64, Legal);
1124 setCondCodeAction(ISD::SETOGE, MVT::f32, Legal);
1125 setCondCodeAction(ISD::SETOGE, MVT::f64, Legal);
1126 setCondCodeAction(ISD::SETUGE, MVT::f32, Legal);
1127 setCondCodeAction(ISD::SETUGE, MVT::f64, Legal);
1129 setCondCodeAction(ISD::SETOGT, MVT::f32, Legal);
1130 setCondCodeAction(ISD::SETOGT, MVT::f64, Legal);
1131 setCondCodeAction(ISD::SETUGT, MVT::f32, Legal);
1132 setCondCodeAction(ISD::SETUGT, MVT::f64, Legal);
1134 setCondCodeAction(ISD::SETOLE, MVT::f32, Legal);
1135 setCondCodeAction(ISD::SETOLE, MVT::f64, Legal);
1136 setCondCodeAction(ISD::SETOLT, MVT::f32, Legal);
1137 setCondCodeAction(ISD::SETOLT, MVT::f64, Legal);
1139 setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
1140 setOperationAction(ISD::ConstantFP, MVT::f64, Legal);
1142 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote);
1143 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Promote);
1144 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote);
1145 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote);
1147 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote);
1148 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote);
1149 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote);
1150 setOperationAction(ISD::SINT_TO_FP, MVT::i8, Promote);
1152 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
1153 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote);
1154 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote);
1155 setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote);
1157 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal);
1158 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Legal);
1159 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal);
1160 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Legal);
1162 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Legal);
1163 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Legal);
1164 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Legal);
1165 setOperationAction(ISD::SINT_TO_FP, MVT::i64, Legal);
1167 setOperationAction(ISD::FABS, MVT::f32, Legal);
1168 setOperationAction(ISD::FABS, MVT::f64, Expand);
1170 setOperationAction(ISD::FNEG, MVT::f32, Legal);
1171 setOperationAction(ISD::FNEG, MVT::f64, Expand);
1175 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Expand);
1176 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
1178 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand);
1179 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
1203 setOperationAction(ISD::FADD, MVT::f64, Expand);
1206 setOperationAction(ISD::FADD, MVT::f32, Expand);
1209 setOperationAction(ISD::FP_EXTEND, MVT::f32, Expand);
1212 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand);
1215 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand);
1218 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
1221 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
1224 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand);
1227 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand);
1230 setOperationAction(ISD::FP_TO_SINT, MVT::f64, Expand);
1233 setOperationAction(ISD::FP_TO_SINT, MVT::f32, Expand);
1236 setCondCodeAction(ISD::SETOLE, MVT::f64, Expand);
1239 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand);
1242 setCondCodeAction(ISD::SETOLT, MVT::f64, Expand);
1245 setCondCodeAction(ISD::SETOLT, MVT::f32, Expand);
1248 setOperationAction(ISD::FMUL, MVT::f64, Expand);
1251 setOperationAction(ISD::MUL, MVT::f32, Expand);
1254 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand);
1259 setOperationAction(ISD::SUB, MVT::f64, Expand);
1262 setOperationAction(ISD::SUB, MVT::f32, Expand);
1265 setOperationAction(ISD::FP_ROUND, MVT::f64, Expand);
1268 setCondCodeAction(ISD::SETUO, MVT::f64, Expand);
1271 setCondCodeAction(ISD::SETO, MVT::f64, Expand);
1274 setCondCodeAction(ISD::SETO, MVT::f32, Expand);
1277 setCondCodeAction(ISD::SETUO, MVT::f32, Expand);
1279 setOperationAction(ISD::FABS, MVT::f32, Expand);
1280 setOperationAction(ISD::FABS, MVT::f64, Expand);
1281 setOperationAction(ISD::FNEG, MVT::f32, Expand);
1282 setOperationAction(ISD::FNEG, MVT::f64, Expand);
1286 setOperationAction(ISD::SREM, MVT::i32, Expand);
1288 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal);
1289 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal);
1290 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal);
1291 setIndexedLoadAction(ISD::POST_INC, MVT::i64, Legal);
1293 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal);
1294 setIndexedStoreAction(ISD
1295 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal);
1296 setIndexedStoreAction(ISD::POST_INC, MVT::i64, Legal);
1298 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand);
1301 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
1303 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Expand);
1308 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
1309 setOperationAction(ISD::GlobalAddress, MVT::i8, Custom);
1310 setOperationAction(ISD::BlockAddress, MVT::i32, Custom);
1312 setOperationAction(ISD::TRUNCATE, MVT::i64, Expand);
1315 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
1318 setOperationAction(ISD::UREM, MVT::i32, Expand);
1319 setOperationAction(ISD::SREM, MVT::i32, Expand);
1320 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
1321 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
1322 setOperationAction(ISD::SREM, MVT::i64, Expand);
1323 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
1324 setOperationAction(ISD::UDIVREM, MVT::i64, Expand);
1326 setOperationAction(ISD::BSWAP, MVT::i64, Expand);
1329 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
1330 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
1337 setOperationAction(ISD::SELECT, MVT::f32, Custom);
1338 setOperationAction(ISD::SELECT, MVT::f64, Custom);
1340 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
1341 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
1342 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
1347 setOperationAction(ISD::SELECT, MVT::f32, Expand);
1348 setOperationAction(ISD::SELECT, MVT::f64, Expand);
1352 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
1357 setOperationAction(ISD::BR_JT, MVT::Other, Custom);
1359 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
1364 setOperationAction(ISD::BR_CC, MVT::f32, Expand);
1365 setOperationAction(ISD::BR_CC, MVT::f64, Expand);
1366 setOperationAction(ISD::BR_CC, MVT::i1, Expand);
1367 setOperationAction(ISD::BR_CC, MVT::i32, Expand);
1368 setOperationAction(ISD::BR_CC, MVT::i64, Expand);
1370 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom);
1372 setOperationAction(ISD::FSIN , MVT::f64, Expand);
1373 setOperationAction(ISD::FCOS , MVT::f64, Expand);
1374 setOperationAction(ISD::FREM , MVT::f64, Expand);
1375 setOperationAction(ISD::FSIN , MVT::f32, Expand);
1376 setOperationAction(ISD::FCOS , MVT::f32, Expand);
1377 setOperationAction(ISD::FREM , MVT::f32, Expand);
1378 setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
1379 setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
1386 setOperationAction(ISD::ADDE, MVT::i8, Expand);
1387 setOperationAction(ISD::ADDE, MVT::i16, Expand);
1388 setOperationAction(ISD::ADDE, MVT::i32, Expand);
1389 setOperationAction(ISD::ADDE, MVT::i64, Expand);
1390 setOperationAction(ISD::SUBE, MVT::i8, Expand);
1391 setOperationAction(ISD::SUBE, MVT::i16, Expand);
1392 setOperationAction(ISD::SUBE, MVT::i32, Expand);
1393 setOperationAction(ISD::SUBE, MVT::i64, Expand);
1394 setOperationAction(ISD::ADDC, MVT::i8, Expand);
1395 setOperationAction(ISD::ADDC, MVT::i16, Expand);
1396 setOperationAction(ISD::ADDC, MVT::i32, Expand);
1397 setOperationAction(ISD::ADDC, MVT::i64, Expand);
1398 setOperationAction(ISD::SUBC, MVT::i8, Expand);
1399 setOperationAction(ISD::SUBC, MVT::i16, Expand);
1400 setOperationAction(ISD::SUBC, MVT::i32, Expand);
1401 setOperationAction(ISD::SUBC, MVT::i64, Expand);
1403 setOperationAction(ISD::CTPOP, MVT::i32, Expand);
1404 setOperationAction(ISD::CTPOP, MVT::i64, Expand);
1405 setOperationAction(ISD::CTTZ , MVT::i32, Expand);
1406 setOperationAction(ISD::CTTZ , MVT::i64, Expand);
1407 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
1408 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
1409 setOperationAction(ISD::CTLZ , MVT::i32, Expand);
1410 setOperationAction(ISD::CTLZ , MVT::i64, Expand);
1411 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
1412 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
1413 setOperationAction(ISD::ROTL , MVT::i32, Expand);
1414 setOperationAction(ISD::ROTR , MVT::i32, Expand);
1415 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
1416 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
1417 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
1418 setOperationAction(ISD::FPOW , MVT::f64, Expand);
1419 setOperationAction(ISD::FPOW , MVT::f32, Expand);
1421 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
1422 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
1423 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
1425 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
1426 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
1428 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
1429 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
1431 setOperationAction(ISD::EH_RETURN, MVT::Other, Custom);
1442 setOperationAction(ISD::VASTART , MVT::Other, Custom);
1445 setOperationAction(ISD::VAARG , MVT::Other, Expand);
1446 setOperationAction(ISD::VACOPY , MVT::Other, Expand);
1447 setOperationAction(ISD::VAEND , MVT::Other, Expand);
1448 setOperationAction(ISD::STACKSAVE , MVT::Other, Expand);
1449 setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
1452 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom);
1453 setOperationAction(ISD::INLINEASM , MVT::Other, Custom);
1534 SDValue StoreAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(),
1551 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
1552 case ISD::EH_RETURN: return LowerEH_RETURN(Op, DAG);
1554 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
1555 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
1556 case ISD::GlobalTLSAddress:
1558 case ISD::ATOMIC_FENCE: return LowerATOMIC_FENCE(Op, DAG);
1559 case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG);
1560 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
1561 case ISD::VASTART: return LowerVASTART(Op, DAG);
1562 case ISD::BR_JT: return LowerBR_JT(Op, DAG);
1564 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
1565 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
1566 case ISD::SELECT: return Op;
1567 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
1568 case ISD::INLINEASM: return LowerINLINEASM(Op, DAG);
1675 const SmallVectorImpl<ISD::OutputArg> &Outs,
1677 const SmallVectorImpl<ISD::InputArg> &Ins,
