Lines Matching refs:MSP430
1 //===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
14 #define DEBUG_TYPE "msp430-lower"
17 #include "MSP430.h"
48 HWMultMode("msp430-hwmult-mode",
67 addRegisterClass(MVT::i8, &MSP430::GR8RegClass);
68 addRegisterClass(MVT::i16, &MSP430::GR16RegClass);
78 setStackPointerRegisterToSaveRestore(MSP430::SPW);
210 // MSP430 Inline Assembly Support
238 return std::make_pair(0U, &MSP430::GR8RegClass);
240 return std::make_pair(0U, &MSP430::GR16RegClass);
291 // MSP430 target does not yet support tail call optimization.
351 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
517 StackPtr = DAG.getCopyFromReg(Chain, dl, MSP430::SPW, getPointerTy());
856 SDValue SR = DAG.getCopyFromReg(DAG.getEntryNode(), dl, MSP430::SRW,
962 MSP430::FPW, VT);
1064 // MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
1069 // MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
1093 case MSP430::Shl8:
1094 Opc = MSP430::SHL8r1;
1095 RC = &MSP430::GR8RegClass;
1097 case MSP430::Shl16:
1098 Opc = MSP430::SHL16r1;
1099 RC = &MSP430::GR16RegClass;
1101 case MSP430::Sra8:
1102 Opc = MSP430::SAR8r1;
1103 RC = &MSP430::GR8RegClass;
1105 case MSP430::Sra16:
1106 Opc = MSP430::SAR16r1;
1107 RC = &MSP430::GR16RegClass;
1109 case MSP430::Srl8:
1110 Opc = MSP430::SAR8r1c;
1111 RC = &MSP430::GR8RegClass;
1113 case MSP430::Srl16:
1114 Opc = MSP430::SAR16r1c;
1115 RC = &MSP430::GR16RegClass;
1143 unsigned ShiftAmtReg = RI.createVirtualRegister(&MSP430::GR8RegClass);
1144 unsigned ShiftAmtReg2 = RI.createVirtualRegister(&MSP430::GR8RegClass);
1154 BuildMI(BB, dl, TII.get(MSP430::CMP8ri))
1156 BuildMI(BB, dl, TII.get(MSP430::JCC))
1165 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftReg)
1168 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftAmtReg)
1173 BuildMI(LoopBB, dl, TII.get(MSP430::SUB8ri), ShiftAmtReg2)
1175 BuildMI(LoopBB, dl, TII.get(MSP430::JCC))
1181 BuildMI(*RemBB, RemBB->begin(), dl, TII.get(MSP430::PHI), DstReg)
1194 if (Opc == MSP430::Shl8 || Opc == MSP430::Shl16 ||
1195 Opc == MSP430::Sra8 || Opc == MSP430::Sra16 ||
1196 Opc == MSP430::Srl8 || Opc == MSP430::Srl16)
1202 assert((Opc == MSP430::Select16 || Opc == MSP430::Select8) &&
1235 BuildMI(BB, dl, TII.get(MSP430::JCC))
1251 BuildMI(*BB, BB->begin(), dl, TII.get(MSP430::PHI),
