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Lines Matching refs:Fixups

63                          SmallVectorImpl<MCFixup> &Fixups) const;
68 SmallVectorImpl<MCFixup> &Fixups) const;
74 SmallVectorImpl<MCFixup> &Fixups) const;
80 SmallVectorImpl<MCFixup> &Fixups) const;
85 SmallVectorImpl<MCFixup> &Fixups) const;
88 SmallVectorImpl<MCFixup> &Fixups) const;
90 SmallVectorImpl<MCFixup> &Fixups) const;
92 SmallVectorImpl<MCFixup> &Fixups) const;
95 getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups) const;
183 SmallVectorImpl<MCFixup> &Fixups) const
204 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups);
218 Binary = getBinaryCodeForInstr(TmpInst, Fixups);
237 SmallVectorImpl<MCFixup> &Fixups) const {
248 Fixups.push_back(MCFixup::Create(0, Expr,
258 SmallVectorImpl<MCFixup> &Fixups) const {
268 Fixups.push_back(MCFixup::Create(0, Expr,
274 getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups) const {
286 unsigned Res = getExprOpValue(cast<MCBinaryExpr>(Expr)->getLHS(), Fixups);
287 Res += getExprOpValue(cast<MCBinaryExpr>(Expr)->getRHS(), Fixups);
291 Mips::Fixups FixupKind = Mips::Fixups(0);
370 Fixups.push_back(MCFixup::Create(0, Expr, MCFixupKind(FixupKind)));
380 SmallVectorImpl<MCFixup> &Fixups) const {
393 return getExprOpValue(MO.getExpr(),Fixups);
400 SmallVectorImpl<MCFixup> &Fixups) const {
403 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups) << 16;
404 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups);
411 SmallVectorImpl<MCFixup> &Fixups) const {
413 unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
421 SmallVectorImpl<MCFixup> &Fixups) const {
424 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);
425 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);