Lines Matching refs:Arg
2198 // If this is the first part of an i64 arg,
2254 SDValue Chain, SDValue Arg, SDLoc DL,
2259 return DAG.getStore(Chain, DL, Arg, PtrOff, MachinePointerInfo(), false,
2264 int FI = MFI->CreateFixedObject(Arg.getValueSizeInBits() / 8, Offset, false);
2266 return DAG.getStore(Chain, DL, Arg, FIN, MachinePointerInfo(),
2389 SDValue Arg = OutVals[i];
2394 // ByVal Arg.
2401 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg,
2415 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg);
2418 Arg, DAG.getConstant(0, MVT::i32));
2420 Arg, DAG.getConstant(1, MVT::i32));
2432 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, LocVT, Arg);
2435 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, LocVT, Arg);
2438 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, LocVT, Arg);
2445 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2455 Chain, Arg, DL, IsTailCall, DAG));
3207 dbgs() << "Formal Arg #" << I << " has unhandled type "
3316 // If Align > RegSize, the first arg register must be even.
3369 // Copy arg registers.
3386 // Copy byVal arg to registers and stack.
3391 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
3407 SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
3435 SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
3470 // Copy remainder of byval arg to it with memcpy.
3472 SDValue Src = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
