Lines Matching refs:addImm
783 .addOperand(MI->getOperand(2)).addReg(Mips::ZERO).addImm(7);
978 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(Ptr).addImm(0);
990 BuildMI(BB, DL, TII->get(SC), Success).addReg(StoreVal).addReg(Ptr).addImm(0);
1070 .addReg(Mips::ZERO).addImm(-4);
1073 BuildMI(BB, DL, TII->get(Mips::ANDi), PtrLSB2).addReg(Ptr).addImm(3);
1075 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1079 .addReg(PtrLSB2).addImm((Size == 1) ? 3 : 2);
1080 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3);
1083 .addReg(Mips::ZERO).addImm(MaskImm);
1109 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
1133 .addReg(StoreVal).addReg(AlignedAddr).addImm(0);
1150 .addReg(SrlRes).addImm(ShiftImm);
1152 .addReg(SllRes).addImm(ShiftImm);
1223 BuildMI(BB, DL, TII->get(LL), Dest).addReg(Ptr).addImm(0);
1232 .addReg(NewVal).addReg(Ptr).addImm(0);
1320 .addReg(Mips::ZERO).addImm(-4);
1323 BuildMI(BB, DL, TII->get(Mips::ANDi), PtrLSB2).addReg(Ptr).addImm(3);
1325 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1329 .addReg(PtrLSB2).addImm((Size == 1) ? 3 : 2);
1330 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3);
1333 .addReg(Mips::ZERO).addImm(MaskImm);
1338 .addReg(CmpVal).addImm(MaskImm);
1342 .addReg(NewVal).addImm(MaskImm);
1351 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
1368 .addReg(StoreVal).addReg(AlignedAddr).addImm(0);
1382 .addReg(SrlRes).addImm(ShiftImm);
1384 .addReg(SllRes).addImm(ShiftImm);
