Lines Matching refs:BuildMI
113 BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)
132 BuildMI(MBB, I, DL, get(Mips::WRDSP))
165 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
208 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
241 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(Offset)
323 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
326 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);
358 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
360 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)
365 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)
387 BuildMI(MBB, I, I->getDebugLoc(), get(Opc)).addReg(Mips::RA);
422 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
423 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);
438 BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(SubReg);
451 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpeven))
453 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpodd))
526 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), T9)
528 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), RA)
530 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), SP)
532 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(JR)).addReg(RA);
