Lines Matching refs:ISD
133 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
134 setOperationAction(ISD::BR_CC, MVT::f32, Expand);
135 setOperationAction(ISD::BR_CC, MVT::f64, Expand);
136 setOperationAction(ISD::BR_CC, MVT::i1, Expand);
137 setOperationAction(ISD::BR_CC, MVT::i8, Expand);
138 setOperationAction(ISD::BR_CC, MVT::i16, Expand);
139 setOperationAction(ISD::BR_CC, MVT::i32, Expand);
140 setOperationAction(ISD::BR_CC, MVT::i64, Expand);
143 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Legal);
144 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Legal);
145 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Legal);
146 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal);
147 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
150 setOperationAction(ISD::ROTL, MVT::i64, Legal);
151 setOperationAction(ISD::ROTR, MVT::i64, Legal);
153 setOperationAction(ISD::ROTL, MVT::i64, Expand);
154 setOperationAction(ISD::ROTR, MVT::i64, Expand);
157 setOperationAction(ISD::ROTL, MVT::i32, Legal);
158 setOperationAction(ISD::ROTR, MVT::i32, Legal);
160 setOperationAction(ISD::ROTL, MVT::i32, Expand);
161 setOperationAction(ISD::ROTR, MVT::i32, Expand);
164 setOperationAction(ISD::ROTL, MVT::i16, Expand);
165 setOperationAction(ISD::ROTR, MVT::i16, Expand);
166 setOperationAction(ISD::ROTL, MVT::i8, Expand);
167 setOperationAction(ISD::ROTR, MVT::i8, Expand);
168 setOperationAction(ISD::BSWAP, MVT::i16, Expand);
169 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
170 setOperationAction(ISD::BSWAP, MVT::i64, Expand);
174 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
175 setOperationAction(ISD::BRIND, MVT::Other, Expand);
177 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
178 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
182 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
185 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
190 setOperationAction(ISD::LOAD, MVT::i1, Custom);
191 setOperationAction(ISD::STORE, MVT::i1, Custom);
193 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
194 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
201 setOperationAction(ISD::ConstantFP, MVT::f64, Legal);
202 setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
205 setOperationAction(ISD::TRAP, MVT::Other, Legal);
207 setOperationAction(ISD::ADDC, MVT::i64, Expand);
208 setOperationAction(ISD::ADDE, MVT::i64, Expand);
215 setOperationAction(ISD::LOAD, VT, Custom);
216 setOperationAction(ISD::STORE, VT, Custom);
217 setOperationAction(ISD::INTRINSIC_W_CHAIN, VT, Custom);
222 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom);
224 setOperationAction(ISD::CTLZ, MVT::i16, Legal);
225 setOperationAction(ISD::CTLZ, MVT::i32, Legal);
226 setOperationAction(ISD::CTLZ, MVT::i64, Legal);
227 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Legal);
228 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Legal);
229 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
230 setOperationAction(ISD::CTTZ, MVT::i16, Expand);
231 setOperationAction(ISD::CTTZ, MVT::i32, Expand);
232 setOperationAction(ISD::CTTZ, MVT::i64, Expand);
233 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand);
234 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
235 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
236 setOperationAction(ISD::CTPOP, MVT::i16, Legal);
237 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
238 setOperationAction(ISD::CTPOP, MVT::i64, Legal);
346 const SmallVectorImpl<ISD::OutputArg> &Outs,
496 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
498 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
567 StVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, StVal);
612 Elt = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt);
627 Elt0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt0);
628 Elt1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt1);
672 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal);
679 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal);
691 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal);
701 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal);
743 unsigned opc = ISD::ZERO_EXTEND;
745 opc = ISD::SIGN_EXTEND;
797 DAG.getNode(ISD::ADD, dl, getPointerTy(), OutVals[OIdx],
803 theVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, theVal);
874 Chain = DAG.getNode(ISD::INLINEASM, dl, InlineAsmVTs, InlineAsmOps, 5);
964 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, EltVT, Ret0);
995 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ret0);
997 Ret1 = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ret1);
1048 Elt = DAG.getNode(ISD::TRUNCATE, dl, EltVT, Elt);
1095 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, Ins[i].VT, Ret0);
1128 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, SubOp,
1132 return DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0), &Ops[0],
1139 case ISD::RETURNADDR:
1141 case ISD::FRAMEADDR:
1143 case ISD::GlobalAddress:
1145 case ISD::INTRINSIC_W_CHAIN:
1147 case ISD::BUILD_VECTOR:
1148 case ISD::EXTRACT_SUBVECTOR:
1150 case ISD::CONCAT_VECTORS:
1152 case ISD::STORE:
1154 case ISD::LOAD:
1176 assert(LD->getExtensionType() == ISD::NON_EXTLOAD);
1183 SDValue result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, newLD);
1261 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val,
1264 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal);
1301 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Tmp3);
1362 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG,
1424 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, partVT));
1435 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
1442 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
1472 DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg,
1480 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ?
1481 ISD::SEXTLOAD : ISD::ZEXTLOAD;
1514 SDValue SrcAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg,
1524 P = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, P);
1534 SDValue SrcAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg,
1543 SDValue Elt0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, P,
1545 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, P,
1549 Elt0 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt0);
1550 Elt1 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt1);
1578 DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg,
1590 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, P,
1593 Elt = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt);
1613 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ?
1614 ISD::SEXTLOAD : ISD::ZEXTLOAD;
1647 ISD::INTRINSIC_WO_CHAIN, dl, ObjectVT,
1662 DAG.setRoot(DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &OutChains[0],
1672 const SmallVectorImpl<ISD::OutputArg> &Outs,
1702 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal);
1714 StoreVal0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal0);
1715 ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal1);
1756 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtendedVT, StoreVal);
1762 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtendedVT, StoreVal);
1774 DAG.getNode(ISD::ZERO_EXTEND, dl, ExtendedVT, StoreVal);
1784 DAG.getNode(ISD::ZERO_EXTEND, dl, ExtendedVT, StoreVal);
1815 TmpVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
1823 TmpVal = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, TmpVal);
1827 TmpVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, TmpVal);
1882 Info.opc = ISD::INTRINSIC_W_CHAIN;
1894 Info.opc = ISD::INTRINSIC_W_CHAIN;
1908 Info.opc = ISD::INTRINSIC_W_CHAIN;
2099 Res = DAG.getNode(ISD::TRUNCATE, DL, ResVT.getVectorElementType(), Res);
2106 DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, &ScalarRes[0], NumElts);
2213 DAG.getNode(ISD::TRUNCATE, DL, ResVT.getVectorElementType(), Res);
2220 DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, &ScalarRes[0], NumElts);
2242 DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, LdResVTs, &Ops[0],
2245 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i8,
2258 case ISD::LOAD:
2261 case ISD::INTRINSIC_W_CHAIN:
