Lines Matching refs:NVPTX
1 //===- NVPTXInstrInfo.cpp - NVPTX Instruction Information -----------------===//
10 // This file contains the NVPTX implementation of the TargetInstrInfo class.
14 #include "NVPTX.h"
42 if (DestRC == &NVPTX::Int32RegsRegClass)
43 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg)
45 else if (DestRC == &NVPTX::Int1RegsRegClass)
46 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg)
48 else if (DestRC == &NVPTX::Float32RegsRegClass)
49 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg)
51 else if (DestRC == &NVPTX::Int16RegsRegClass)
52 BuildMI(MBB, I, DL, get(NVPTX::IMOV16rr), DestReg)
54 else if (DestRC == &NVPTX::Int64RegsRegClass)
55 BuildMI(MBB, I, DL, get(NVPTX::IMOV64rr), DestReg)
57 else if (DestRC == &NVPTX::Float64RegsRegClass)
58 BuildMI(MBB, I, DL, get(NVPTX::FMOV64rr), DestReg)
71 (MI.getDesc().TSFlags & NVPTX::SimpleMoveMask) >> NVPTX::SimpleMoveShift;
92 case NVPTX::INT_PTX_SREG_NTID_X:
93 case NVPTX::INT_PTX_SREG_NTID_Y:
94 case NVPTX::INT_PTX_SREG_NTID_Z:
95 case NVPTX::INT_PTX_SREG_TID_X:
96 case NVPTX::INT_PTX_SREG_TID_Y:
97 case NVPTX::INT_PTX_SREG_TID_Z:
98 case NVPTX::INT_PTX_SREG_CTAID_X:
99 case NVPTX::INT_PTX_SREG_CTAID_Y:
100 case NVPTX::INT_PTX_SREG_CTAID_Z:
101 case NVPTX::INT_PTX_SREG_NCTAID_X:
102 case NVPTX::INT_PTX_SREG_NCTAID_Y:
103 case NVPTX::INT_PTX_SREG_NCTAID_Z:
104 case NVPTX::INT_PTX_SREG_WARPSIZE:
113 (MI.getDesc().TSFlags & NVPTX::isLoadMask) >> NVPTX::isLoadShift;
124 (MI.getDesc().TSFlags & NVPTX::isStoreMask) >> NVPTX::isStoreShift;
133 if (MI->getOpcode() == NVPTX::INT_CUDA_SYNCTHREADS)
136 if (addrspace == NVPTX::PTXLdStInstCode::SHARED)
139 if (addrspace == NVPTX::PTXLdStInstCode::SHARED)
180 if (LastInst->getOpcode() == NVPTX::GOTO) {
183 } else if (LastInst->getOpcode() == NVPTX::CBranch) {
200 // If the block ends with NVPTX::GOTO and NVPTX:CBranch, handle it.
201 if (SecondLastInst->getOpcode() == NVPTX::CBranch &&
202 LastInst->getOpcode() == NVPTX::GOTO) {
209 // If the block ends with two NVPTX:GOTOs, handle it. The second one is not
211 if (SecondLastInst->getOpcode() == NVPTX::GOTO &&
212 LastInst->getOpcode() == NVPTX::GOTO) {
229 if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch)
240 if (I->getOpcode() != NVPTX::CBranch)
254 "NVPTX branch conditions have two components!");
259 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(TBB);
261 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg())
267 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB);
268 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(FBB);
