Lines Matching full:intop
71 class MEMBAR<string StrOp, Intrinsic IntOP> :
73 StrOp, [(IntOP)]>;
120 NVPTXRegClass src_regclass, Intrinsic IntOP>
123 [(set target_regclass:$dst, (IntOP src_regclass:$src0))]>;
128 NVPTXRegClass s0_regclass, NVPTXRegClass s1_regclass, Intrinsic IntOP>
132 [(set t_regclass:$dst, (IntOP s0_regclass:$src0, s1_regclass:$src1))]>;
136 NVPTXRegClass s2_regclass, Intrinsic IntOP>
141 (IntOP s0_regclass:$src0, s1_regclass:$src1, s2_regclass:$src2))]>;
834 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
842 [(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b))]>,
850 [(set regclass:$dst, (IntOp ptrclass:$addr, IMM:$b))]>,
854 string OpcStr, PatFrag IntOp, Operand IMMType, SDNode IMM, Predicate Pred> {
856 IntOp, IMMType, IMM, Pred>;
858 IntOp, IMMType, IMM, Pred>;
863 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
880 [(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b))]>,
884 string TypeStr, string OpcStr, PatFrag IntOp, Operand IMMType,
887 IntOp, IMMType, Pred> ;
889 IntOp, IMMType, Pred> ;
894 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
904 (IntOp ptrclass:$addr, regclass:$b, regclass:$c))]>,
913 [(set regclass:$dst, (IntOp ptrclass:$addr, imm:$b, regclass:$c))]>,
922 [(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b, imm:$c))]>,
931 [(set regclass:$dst, (IntOp ptrclass:$addr, imm:$b, imm:$c))]>,
935 string OpcStr, PatFrag IntOp, Operand IMMType, Predicate Pred> {
937 IntOp, IMMType, Pred>;
939 IntOp, IMMType, Pred>;
1238 class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> :
1241 [(set regclassOut:$dst, (IntOp))]>;
1286 multiclass LDU_G<string TyStr, NVPTXRegClass regclass, Intrinsic IntOp> {
1289 [(set regclass:$result, (IntOp Int32Regs:$src))]>, Requires<[hasLDU]>;
1292 [(set regclass:$result, (IntOp Int64Regs:$src))]>, Requires<[hasLDU]>;
1295 [(set regclass:$result, (IntOp (Wrapper tglobaladdr:$src)))]>,
1299 [(set regclass:$result, (IntOp ADDRri:$src))]>, Requires<[hasLDU]>;
1302 [(set regclass:$result, (IntOp ADDRri64:$src))]>, Requires<[hasLDU]>;
1305 multiclass LDU_G_NOINTRIN<string TyStr, NVPTXRegClass regclass, PatFrag IntOp> {
1308 [(set regclass:$result, (IntOp Int32Regs:$src))]>, Requires<[hasLDU]>;
1311 [(set regclass:$result, (IntOp Int64Regs:$src))]>, Requires<[hasLDU]>;
1314 [(set regclass:$result, (IntOp (Wrapper tglobaladdr:$src)))]>,
1318 [(set regclass:$result, (IntOp ADDRri:$src))]>, Requires<[hasLDU]>;
1321 [(set regclass:$result, (IntOp ADDRri64:$src))]>, Requires<[hasLDU]>;
1414 multiclass LDG_G<string TyStr, NVPTXRegClass regclass, Intrinsic IntOp> {
1417 [(set regclass:$result, (IntOp Int32Regs:$src))]>, Requires<[hasLDG]>;
1420 [(set regclass:$result, (IntOp Int64Regs:$src))]>, Requires<[hasLDG]>;
1423 [(set regclass:$result, (IntOp (Wrapper tglobaladdr:$src)))]>,
1427 [(set regclass:$result, (IntOp ADDRri:$src))]>, Requires<[hasLDG]>;
1430 [(set regclass:$result, (IntOp ADDRri64:$src))]>, Requires<[hasLDG]>;
1433 multiclass LDG_G_NOINTRIN<string TyStr, NVPTXRegClass regclass, PatFrag IntOp> {
1436 IntOp Int32Regs:$src))]>, Requires<[hasLDG]>;
1439 [(set regclass:$result, (IntOp Int64Regs:$src))]>, Requires<[hasLDG]>;
1442 [(set regclass:$result, (IntOp (Wrapper tglobaladdr:$src)))]>,
1446 [(set regclass:$result, (IntOp ADDRri:$src))]>, Requires<[hasLDG]>;
1449 [(set regclass:$result, (IntOp ADDRri64:$src))]>, Requires<[hasLDG]>;
1696 class PTX_READ_SPECIAL_REGISTER_R64<string regname, Intrinsic intop>
1699 [(set Int64Regs:$d, (intop))]>;
1701 class PTX_READ_SPECIAL_REGISTER_R32<string regname, Intrinsic intop>
1704 [(set Int32Regs:$d, (intop))]>;
