Lines Matching refs:SH
99 unsigned &SH, unsigned &MB, unsigned &ME);
357 bool isShiftMask, unsigned &SH,
391 SH = Shift & 31;
415 unsigned Value, SH = 0;
447 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
456 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
460 SH &= 31;
461 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB),
1098 unsigned Imm, Imm2, SH, MB, ME;
1104 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, MB, ME)) {
1106 SDValue Ops[] = { Val, getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
1157 unsigned Imm, SH, MB, ME;
1159 isRotateAndMask(N, Imm, true, SH, MB, ME)) {
1161 getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
1169 unsigned Imm, SH, MB, ME;
1171 isRotateAndMask(N, Imm, true, SH, MB, ME)) {
1173 getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
