Lines Matching defs:Reg0
171 unsigned Reg0 = MI->getOperand(0).getReg();179 if (Reg0 == Reg1) {193 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();196 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
