Lines Matching full:getnode
516 return DAG.getNode(AMDGPUISD::EXPORT, SDLoc(Op), Op.getValueType(),
646 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs, 19);
650 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
652 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
654 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
656 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
658 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
660 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
662 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
664 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
667 return DAG.getNode(AMDGPUISD::DOT4, DL, MVT::f32, Args, 8);
723 SDNode *Node = LowerLOAD(SDValue(N, 0), DAG).getNode();
732 SDNode *Node = LowerSTORE(SDValue(N, 0), DAG).getNode();
743 SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, SDLoc(Op), VT,
744 DAG.getNode(ISD::FADD, SDLoc(Op), VT,
745 DAG.getNode(ISD::FMUL, SDLoc(Op), VT, Arg,
759 SDValue TrigVal = DAG.getNode(TrigNode, SDLoc(Op), VT,
760 DAG.getNode(ISD::FADD, SDLoc(Op), VT, FractPart,
765 return DAG.getNode(ISD::FMUL, SDLoc(Op), VT, TrigVal,
770 return DAG.getNode(
854 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
875 True = DAG.getNode(ISD::BITCAST, DL, CompareVT, True);
876 False = DAG.getNode(ISD::BITCAST, DL, CompareVT, False);
900 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT,
904 return DAG.getNode(ISD::BITCAST, DL, VT, SelectNode);
910 if (MinMax.getNode()) {
931 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC);
933 return DAG.getNode(ISD::SELECT_CC, DL, VT,
940 return DAG.getNode(ISD::SELECT_CC,
972 return DAG.getNode(ISD::SRL, SDLoc(Ptr), Ptr.getValueType(), Ptr,
1015 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, Ptr.getValueType(),
1016 DAG.getNode(ISD::SRL, DL, Ptr.getValueType(),
1053 Ptr = DAG.getNode(ISD::ADD, DL, MVT::i32, Ptr,
1055 SDValue Elem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT,
1058 Stores[i] = DAG.getNode(AMDGPUISD::REGISTER_STORE, DL, MVT::Other,
1062 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores, NumElemVT);
1065 Value = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Value);
1067 Chain = DAG.getNode(AMDGPUISD::REGISTER_STORE, DL, MVT::Other, Chain, Value, Ptr,
1137 SDValue NewPtr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1139 Slots[i] = DAG.getNode(AMDGPUISD::CONST_ADDRESS, DL, MVT::i32, NewPtr);
1147 Result = DAG.getNode(ISD::BUILD_VECTOR, DL, NewVT, Slots, NumElements);
1150 Result = DAG.getNode(AMDGPUISD::CONST_ADDRESS, DL, MVT::v4i32,
1151 DAG.getNode(ISD::SRL, DL, MVT::i32, Ptr, DAG.getConstant(4, MVT::i32)),
1158 Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, Result,
1186 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, NewLoad, ShiftAmount);
1187 SDValue Sra = DAG.getNode(ISD::SRA, DL, VT, Shl, ShiftAmount);
1216 Ptr = DAG.getNode(ISD::ADD, DL, MVT::i32, Ptr,
1218 Loads[i] = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, ElemVT,
1227 LoweredLoad = DAG.getNode(ISD::BUILD_VECTOR, DL, TargetVT, Loads, 4);
1229 LoweredLoad = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, VT,
1316 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(VectorEntry),
1347 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(VectorEntry),
1390 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), N->getValueType(0),
1415 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1453 Ops.append(InVec.getNode()->op_begin(),
1454 InVec.getNode()->op_end());
1469 DAG.getNode(ISD::ANY_EXTEND, dl, OpVT, InVal) :
1470 DAG.getNode(ISD::TRUNCATE, dl, OpVT, InVal);
1475 return DAG.getNode(ISD::BUILD_VECTOR, dl,
1493 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getVTList(),
1515 if (LHS.getOperand(2).getNode() != True.getNode() ||
1516 LHS.getOperand(3).getNode() != False.getNode() ||
1517 RHS.getNode() != False.getNode()) {
1554 return DAG.getNode(AMDGPUISD::EXPORT, DL, N->getVTList(), NewArgs, 8);
1583 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, SDLoc(N), N->getVTList(),
