Lines Matching refs:AMDGPU
31 Reserved.set(AMDGPU::ZERO);
32 Reserved.set(AMDGPU::HALF);
33 Reserved.set(AMDGPU::ONE);
34 Reserved.set(AMDGPU::ONE_INT);
35 Reserved.set(AMDGPU::NEG_HALF);
36 Reserved.set(AMDGPU::NEG_ONE);
37 Reserved.set(AMDGPU::PV_X);
38 Reserved.set(AMDGPU::ALU_LITERAL_X);
39 Reserved.set(AMDGPU::ALU_CONST);
40 Reserved.set(AMDGPU::PREDICATE_BIT);
41 Reserved.set(AMDGPU::PRED_SEL_OFF);
42 Reserved.set(AMDGPU::PRED_SEL_ZERO);
43 Reserved.set(AMDGPU::PRED_SEL_ONE);
45 for (TargetRegisterClass::iterator I = AMDGPU::R600_AddrRegClass.begin(),
46 E = AMDGPU::R600_AddrRegClass.end(); I != E; ++I) {
50 for (TargetRegisterClass::iterator I = AMDGPU::TRegMemRegClass.begin(),
51 E = AMDGPU::TRegMemRegClass.end();
70 case AMDGPU::GPRF32RegClassID:
71 case AMDGPU::GPRI32RegClassID:
72 return &AMDGPU::R600_Reg32RegClass;
85 case MVT::i32: return &AMDGPU::R600_TReg32RegClass;
92 case 0: return AMDGPU::sub0;
93 case 1: return AMDGPU::sub1;
94 case 2: return AMDGPU::sub2;
95 case 3: return AMDGPU::sub3;