Lines Matching full:setcc
78 setOperationAction(ISD::SETCC, MVT::v2i1, Expand);
79 setOperationAction(ISD::SETCC, MVT::v4i1, Expand);
92 setTargetDAGCombine(ISD::SETCC);
431 if (Intr->getOpcode() == ISD::SETCC) {
433 SDNode *SetCC = Intr;
434 assert(SetCC->getConstantOperandVal(1) == 1);
435 assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
437 Intr = SetCC
513 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC);
560 // i1 selectcc(l, r, -1, 0, cc) -> i1 setcc(l, r, cc)
566 return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0),
572 case ISD::SETCC: {
579 // i1 setcc (sext(i1), 0, setne) -> i1 setcc(i1, 0, setne)
