Lines Matching refs:I7
156 assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7 && "Unexpected enum");157 if (Reg >= SP::I0 && Reg <= SP::I7)256 // The return address is always %i7+8 with the 64-bit ABI.1737 unsigned RetReg = MF.addLiveIn(SP::I7,
