Lines Matching refs:ISD
39 ISD::ArgFlagsTy &ArgFlags, CCState &State)
52 ISD::ArgFlagsTy &ArgFlags, CCState &State)
81 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
120 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
165 const SmallVectorImpl<ISD::OutputArg> &Outs,
176 const SmallVectorImpl<ISD::OutputArg> &Outs,
239 const SmallVectorImpl<ISD::OutputArg> &Outs,
268 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal);
271 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal);
274 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal);
282 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal,
288 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]);
289 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV);
316 const SmallVectorImpl<ISD::InputArg> &Ins,
334 const SmallVectorImpl<ISD::InputArg> &Ins,
388 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
389 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
397 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg);
399 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg,
401 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg);
443 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
444 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
459 ISD::LoadExtType LoadOp = ISD::SEXTLOAD;
462 FIPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, FIPtr,
467 Load = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Load);
481 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);
521 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
534 const SmallVectorImpl<ISD::InputArg> &Ins,
562 Arg = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), Arg,
569 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg,
573 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg,
582 Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg);
637 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
657 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
659 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
686 ISD::ArgFlagsTy Flags = Outs[i].Flags;
720 ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
731 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
734 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
737 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
740 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
749 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
766 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
782 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
799 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
809 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
815 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
830 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg);
840 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
849 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
945 ArrayRef<ISD::OutputArg> Outs) {
1032 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg);
1035 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg);
1038 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg);
1041 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg);
1049 Arg = DAG.getNode(ISD::SHL, DL, MVT::i64, Arg,
1056 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64,
1058 Arg = DAG.getNode(ISD::OR, DL, MVT::i64, Arg, NV);
1076 PtrOff = DAG.getNode(ISD::ADD, DL, getPointerTy(), StackPtr, PtrOff);
1084 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
1149 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg)
1161 RV = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), RV,
1168 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV,
1172 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV,
1181 RV = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), RV);
1195 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1198 case ISD::SETEQ: return SPCC::ICC_E;
1199 case ISD::SETNE: return SPCC::ICC_NE;
1200 case ISD::SETLT: return SPCC::ICC_L;
1201 case ISD::SETGT: return SPCC::ICC_G;
1202 case ISD::SETLE: return SPCC::ICC_LE;
1203 case ISD::SETGE: return SPCC::ICC_GE;
1204 case ISD::SETULT: return SPCC::ICC_CS;
1205 case ISD::SETULE: return SPCC::ICC_LEU;
1206 case ISD::SETUGT: return SPCC::ICC_GU;
1207 case ISD::SETUGE: return SPCC::ICC_CC;
1213 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1216 case ISD::SETEQ:
1217 case ISD::SETOEQ: return SPCC::FCC_E;
1218 case ISD::SETNE:
1219 case ISD::SETUNE: return SPCC::FCC_NE;
1220 case ISD::SETLT:
1221 case ISD::SETOLT: return SPCC::FCC_L;
1222 case ISD::SETGT:
1223 case ISD
1224 case ISD::SETLE:
1225 case ISD::SETOLE: return SPCC::FCC_LE;
1226 case ISD::SETGE:
1227 case ISD::SETOGE: return SPCC::FCC_GE;
1228 case ISD::SETULT: return SPCC::FCC_UL;
1229 case ISD::SETULE: return SPCC::FCC_ULE;
1230 case ISD::SETUGT: return SPCC::FCC_UG;
1231 case ISD::SETUGE: return SPCC::FCC_UGE;
1232 case ISD::SETUO: return SPCC::FCC_U;
1233 case ISD::SETO: return SPCC::FCC_O;
1234 case ISD::SETONE: return SPCC::FCC_LG;
1235 case ISD::SETUEQ: return SPCC::FCC_UE;
1251 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
1253 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
1258 setOperationAction(ISD::GlobalAddress, getPointerTy(), Custom);
1259 setOperationAction(ISD::GlobalTLSAddress, getPointerTy(), Custom);
1260 setOperationAction(ISD::ConstantPool, getPointerTy(), Custom);
1261 setOperationAction(ISD::BlockAddress, getPointerTy(), Custom);
1264 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
1265 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
1266 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
1269 setOperationAction(ISD::UREM, MVT::i32, Expand);
1270 setOperationAction(ISD::SREM, MVT::i32, Expand);
1271 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
1272 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
1275 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
1276 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
1279 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
1280 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
1282 setOperationAction(ISD::BITCAST, MVT::f32, Expand);
1283 setOperationAction(ISD::BITCAST, MVT::i32, Expand);
1286 setOperationAction(ISD::SELECT, MVT::i32, Expand);
1287 setOperationAction(ISD::SELECT, MVT::f32, Expand);
1288 setOperationAction(ISD::SELECT, MVT::f64, Expand);
1289 setOperationAction(ISD::SETCC, MVT::i32, Expand);
1290 setOperationAction(ISD::SETCC, MVT::f32, Expand);
1291 setOperationAction(ISD::SETCC, MVT::f64, Expand);
1294 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
1295 setOperationAction(ISD::BRIND, MVT::Other, Expand);
1296 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
1297 setOperationAction(ISD::BR_CC, MVT::i32, Custom);
1298 setOperationAction(ISD::BR_CC, MVT::f32, Custom);
1299 setOperationAction(ISD::BR_CC, MVT::f64, Custom);
1301 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
1302 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
1303 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
1306 setOperationAction(ISD::BITCAST, MVT::f64, Expand);
1307 setOperationAction(ISD::BITCAST, MVT::i64, Expand);
1308 setOperationAction(ISD::SELECT, MVT::i64, Expand);
1309 setOperationAction(ISD::SETCC, MVT::i64, Expand);
1310 setOperationAction(ISD::BR_CC, MVT::i64, Custom);
1311 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
1316 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand);
1320 setOperationAction(ISD::FNEG, MVT::f64, Custom);
1321 setOperationAction(ISD::FABS, MVT::f64, Custom);
1324 setOperationAction(ISD::FSIN , MVT::f64, Expand);
1325 setOperationAction(ISD::FCOS , MVT::f64, Expand);
1326 setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
1327 setOperationAction(ISD::FREM , MVT::f64, Expand);
1328 setOperationAction(ISD::FMA , MVT::f64, Expand);
1329 setOperationAction(ISD::FSIN , MVT::f32, Expand);
1330 setOperationAction(ISD::FCOS , MVT::f32, Expand);
1331 setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
1332 setOperationAction(ISD::FREM , MVT::f32, Expand);
1333 setOperationAction(ISD::FMA , MVT::f32, Expand);
1334 setOperationAction(ISD::CTPOP, MVT::i32, Expand);
1335 setOperationAction(ISD::CTTZ , MVT::i32, Expand);
1336 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
1337 setOperationAction(ISD::CTLZ , MVT::i32, Expand);
1338 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
1339 setOperationAction(ISD::ROTL , MVT::i32, Expand);
1340 setOperationAction(ISD::ROTR , MVT::i32, Expand);
1341 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
1342 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
1343 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
1344 setOperationAction(ISD::FPOW , MVT::f64, Expand);
1345 setOperationAction(ISD::FPOW , MVT::f32, Expand);
1347 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
1348 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
1349 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
1352 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
1353 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
1355 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
1358 setOperationAction(ISD::VASTART , MVT::Other, Custom);
1360 setOperationAction(ISD::VAARG , MVT::Other, Custom);
1363 setOperationAction(ISD::VACOPY , MVT::Other, Expand);
1364 setOperationAction(ISD::VAEND , MVT::Other, Expand);
1365 setOperationAction(ISD::STACKSAVE , MVT::Other, Expand);
1366 setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
1367 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom);
1370 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
1375 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
1436 ISD::CondCode CC, unsigned &SPCC) {
1439 CC == ISD::SETNE &&
1493 return DAG.getNode(ISD::ADD, DL, VT, Hi, Lo);
1507 SDValue AbsAddr = DAG.getNode(ISD::ADD, DL, VT, GlobalBase, HiLo);
1522 H44 = DAG.getNode(ISD::SHL, DL, VT, H44, DAG.getConstant(12, MVT::i32));
1525 return DAG.getNode(ISD::ADD, DL, VT, H44, L44);
1530 Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, DAG.getConstant(32, MVT::i32));
1532 return DAG.getNode(ISD::ADD, DL, VT, Hi, Lo);
1557 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
1563 SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0));
1570 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
1600 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
1637 DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(),
1656 SDValue NextPtr = DAG.getNode(ISD::ADD, DL, PtrVT, VAList,
1675 SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value
1680 SDValue NewVal = DAG.getNode(ISD::ADD, dl, MVT::i32, NewSP,
1713 SDValue Ptr = DAG.getNode(ISD::ADD,
1749 SDValue Ptr = DAG.getNode(ISD::ADD,
1767 assert(Op.getOpcode() == ISD::FNEG || Op.getOpcode() == ISD::FABS);
1795 case ISD::FNEG:
1796 case ISD::FABS: return LowerF64Op(Op, DAG);
1798 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG, *this);
1799 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
1800 case ISD::GlobalTLSAddress:
1802 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
1803 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
1804 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
1805 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
1806 case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG);
1807 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
1808 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
1809 case ISD::VASTART: return LowerVASTART(Op, DAG, *this);
1810 case ISD::VAARG: return LowerVAARG(Op, DAG);
1811 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
