Lines Matching full:simm13
64 // The ALU instructions want their simm13 operands as i32 immediates.
68 def : Pat<(i64 simm13:$val), (ORri (i64 G0), (as_i32imm $val))>;
98 // (sllx simm13, n)
102 // (xor (sllx sethi), simm13)
103 // (sllx (xor sethi, simm13))
112 // (or (sllx sethi), (or sethi, simm13))
113 // (xnor (sllx sethi), (or sethi, simm13))
119 // (or (sllx (or sethi, simmm13)), (or sethi, simm13))
167 def : Pat<(and i64:$a, (i64 simm13:$b)), (ANDri $a, (as_i32imm $b))>;
168 def : Pat<(or i64:$a, (i64 simm13:$b)), (ORri $a, (as_i32imm $b))>;
169 def : Pat<(xor i64:$a, (i64 simm13:$b)), (XORri $a, (as_i32imm $b))>;
171 def : Pat<(add i64:$a, (i64 simm13:$b)), (ADDri $a, (as_i32imm $b))>;
172 def : Pat<(sub i64:$a, (i64 simm13:$b)), (SUBri $a, (as_i32imm $b))>;
174 def : Pat<(SPcmpicc i64:$a, (i64 simm13:$b)), (CMPri $a, (as_i32imm $b))>;
192 [(set i64:$rd, (mul i64:$rs1, (i64 simm13:$i)))]>;
203 [(set i64:$rd, (sdiv i64:$rs1, (i64 simm13:$i)))]>;
212 [(set i64:$rd, (udiv i64:$rs1, (i64 simm13:$i)))]>;
