Lines Matching refs:Disp
85 // Base + Disp + Index, where Base and Index are LLVM registers or 0.
94 const MCExpr *Disp;
151 const MCExpr *Disp, unsigned Index,
158 Op->Mem.Disp = Disp;
213 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff);
216 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287);
246 addExpr(Inst, Mem.Disp);
252 addExpr(Inst, Mem.Disp);
259 addExpr(Inst, Mem.Disp);
317 bool parseAddress(unsigned &Base, const MCExpr *&Disp,
505 // Parse a memory operand into Base, Disp, Index and Length.
508 bool SystemZAsmParser::parseAddress(unsigned &Base, const MCExpr *&Disp,
513 if (getParser().parseExpression(Disp))
563 const MCExpr *Disp;
565 if (parseAddress(Base, Disp, Index, Length, Regs, RegKind))
588 Operands.push_back(SystemZOperand::createMem(RegKind, Base, Disp, Index,
