Lines Matching defs:BaseReg
204 unsigned BaseReg, IndexReg, TmpReg, Scale;
213 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0),
217 unsigned getBaseReg() { return BaseReg; }
246 // If we already have a BaseReg, then assume this is the IndexReg with
248 if (!BaseReg) {
249 BaseReg = TmpReg;
251 assert (!IndexReg && "BaseReg/IndexReg already set!");
282 // If we already have a BaseReg, then assume this is the IndexReg with
284 if (!BaseReg) {
285 BaseReg = TmpReg;
287 assert (!IndexReg && "BaseReg/IndexReg already set!");
423 // If we already have a BaseReg, then assume this is the IndexReg with
425 if (!BaseReg) {
426 BaseReg = TmpReg;
428 assert (!IndexReg && "BaseReg/IndexReg already set!");
512 unsigned BaseReg, unsigned IndexReg,
640 unsigned BaseReg;
701 return Mem.BaseReg;
969 Res->Mem.BaseReg = 0;
981 unsigned BaseReg, unsigned IndexReg,
988 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
996 Res->Mem.BaseReg = BaseReg;
1010 unsigned basereg = is64BitMode() ? X86::RSI : X86::ESI;
1016 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0);
1020 unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI;
1026 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0;
1160 unsigned BaseReg, unsigned IndexReg,
1185 BaseReg = BaseReg ? BaseReg : 1;
1186 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale, Start,
1200 // bracketed expression (i.e., ImmDisp [ BaseReg + Scale*IndexReg + Disp])
1343 // Parse [ Symbol + ImmDisp ] and [ BaseReg + Scale*IndexReg + ImmDisp ]. We
1374 int BaseReg = SM.getBaseReg();
1379 if (!BaseReg && !IndexReg) {
1385 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale, Start,
1390 return CreateMemForInlineAsm(SegReg, Disp, BaseReg, IndexReg, Scale, Start,
1442 // Parse ImmDisp [ BaseReg + Scale*IndexReg + Disp ].
1480 return CreateMemForInlineAsm(/*SegReg=*/0, Val, /*BaseReg=*/0,/*IndexReg=*/0,
1641 // Parse ImmDisp [ BaseReg + Scale*IndexReg + Disp ].
1697 /// ParseMemOperand: segment: disp(basereg, indexreg, scale). The '%ds:' prefix
1753 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
1758 if (ParseRegister(BaseReg, StartLoc, EndLoc)) return 0;
1759 if (BaseReg == X86::EIZ || BaseReg == X86::RIZ) {
1833 if (BaseReg != 0 && IndexReg != 0) {
1834 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) &&
1841 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) &&
1850 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
1994 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
1996 Operands.back() = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
2007 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
2009 Operands.begin()[1] = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
