Lines Matching defs:PrevState
203 IntelExprState State, PrevState;
213 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0),
245 if (CurrState == IES_REGISTER && PrevState != IES_MULTIPLY) {
258 PrevState = CurrState;
281 if (CurrState == IES_REGISTER && PrevState != IES_MULTIPLY) {
294 PrevState = CurrState;
310 if (PrevState == IES_INTEGER) {
323 PrevState = CurrState;
326 PrevState = State;
352 if (PrevState == IES_REGISTER && CurrState == IES_MULTIPLY) {
359 } else if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
360 PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
361 PrevState == IES_LPAREN || PrevState == IES_LBRAC) &&
371 PrevState = CurrState;
374 PrevState = State;
388 PrevState = State;
401 PrevState = State;
422 if (CurrState == IES_REGISTER && PrevState != IES_MULTIPLY) {
435 PrevState = CurrState;
449 if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
450 PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
451 PrevState == IES_LPAREN || PrevState == IES_LBRAC) &&
460 PrevState = CurrState;
463 PrevState = State;
