Lines Matching full:opcode
44 const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii) {
46 return MII->getName(Opcode);
250 uint32_t Opcode = mcInst.getOpcode();
257 if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri &&
258 Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri &&
259 Opcode != X86::DPPSrri && Opcode != X86::DPPDrri &&
260 Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri &&
261 Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri &&
262 Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri &&
263 Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri &&
264 Opcode != X86::VDPPSYrmi && Opcode != X86::VDPPDrri &&
265 Opcode != X86::VINSERTPSrr)
412 uint32_t Opcode = mcInst.getOpcode();
413 bool IndexIs128 = (Opcode == X86::VGATHERDPDrm ||
414 Opcode == X86::VGATHERDPDYrm ||
415 Opcode == X86::VGATHERQPDrm ||
416 Opcode == X86::VGATHERDPSrm ||
417 Opcode == X86::VGATHERQPSrm ||
418 Opcode == X86::VPGATHERDQrm ||
419 Opcode == X86::VPGATHERDQYrm ||
420 Opcode == X86::VPGATHERQQrm ||
421 Opcode == X86::VPGATHERDDrm ||
422 Opcode == X86::VPGATHERQDrm);
423 bool IndexIs256 = (Opcode == X86::VGATHERQPDYrm ||
424 Opcode == X86::VGATHERDPSYrm ||
425 Opcode == X86::VGATHERQPSYrm ||
426 Opcode == X86::VPGATHERQQYrm ||
427 Opcode == X86::VPGATHERDDYrm ||
428 Opcode == X86::VPGATHERQDYrm);
693 // opcode to those instead of the rep and repne opcodes.
