Lines Matching full:opcode
181 // Get opcode and regclass of the output for the given load instruction.
240 // Get opcode and regclass of the output for the given store instruction.
333 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g.
351 unsigned Opcode = Instruction::UserOp1;
358 Opcode = I->getOpcode();
362 Opcode = C->getOpcode();
372 switch (Opcode) {
611 unsigned Opcode = Instruction::UserOp1;
613 Opcode = I->getOpcode();
616 Opcode = C->getOpcode();
620 switch (Opcode) {
890 /// of the comparison, return an opcode that works for the compare (e.g.
1092 unsigned BranchOpc; // Opcode to jump on, e.g. "X86::JA"
1290 unsigned OpDivRem; // The specific DIV/IDIV opcode to use.
1291 unsigned OpSignExtend; // Opcode for sign-extending lowreg into
1293 unsigned OpCopy; // Opcode for copying dividend into lowreg, or
1346 default: llvm_unreachable("Unexpected div/rem opcode");
2323 // Get opcode and regclass of the output for the given load instruction.
2445 // Get opcode and regclass for the given zero.
